| Message ID | 20241219-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-32-v3-5-92c7c0a228e3@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | (no cover subject) | expand |
Jessica Zhang <quic_jesszhan@quicinc.com> 于2025年1月9日周四 09:29写道： > > > > On 12/18/2024 11:49 PM, Jun Nie wrote: > > Add the case to reserve multiple pairs mixers for high resolution. > > Current code only supports one pair of mixer usage case. To support > > quad-pipe usage case, two pairs of mixers are needed. > > > > Current code resets number of mixer on failure of pair's peer test and > > retry on another pair. If two pairs are needed, the failure on the test > > of 2nd pair results clearing to the 1st pair. This patch only clear the > > bit for the 2nd pair allocation before retry on another pair. > > Hi Jun, > > I think the commit message wording is a bit unclear. Maybe something > like "Reset the current lm_count to an even number instead of completely > clearing it. This prevents all pairs from being cleared in cases where > multiple LM pairs are needed" Thanks for the suggestion! Will adopt it. > > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > index cde3c5616f9bc..a8b01b78c02c7 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > @@ -316,7 +316,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, > > if (!rm->mixer_blks[i]) > > continue; > > > > - lm_count = 0; > > + /* > > + * Clear the last bit to drop the previous primary mixer if > > + * fail to find its peer. > > Same here can we reword it to something like "Reset lm_count to an even > index. This will drop the previous primary mixer if ..." Will do. > > > + */ > > + lm_count &= 0xfe; > > Nit: Can we directly clear the first bit instead of doing an 8-bit bitmask? Could you elaborate on it? Or you are suggesting to mask 0xFFFFFFFE? - Jun > > Thanks, > > Jessica Zhang > > > lm_idx[lm_count] = i; > > > > if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state, > > > > -- > > 2.34.1 > > >
On Thu, Jan 09, 2025 at 12:40:23PM +0800, Jun Nie wrote: > Jessica Zhang <quic_jesszhan@quicinc.com> 于2025年1月9日周四 09:29写道： > > > > > > > > On 12/18/2024 11:49 PM, Jun Nie wrote: > > > Add the case to reserve multiple pairs mixers for high resolution. > > > Current code only supports one pair of mixer usage case. To support > > > quad-pipe usage case, two pairs of mixers are needed. > > > > > > Current code resets number of mixer on failure of pair's peer test and > > > retry on another pair. If two pairs are needed, the failure on the test > > > of 2nd pair results clearing to the 1st pair. This patch only clear the > > > bit for the 2nd pair allocation before retry on another pair. > > > > Hi Jun, > > > > I think the commit message wording is a bit unclear. Maybe something > > like "Reset the current lm_count to an even number instead of completely > > clearing it. This prevents all pairs from being cleared in cases where > > multiple LM pairs are needed" > > Thanks for the suggestion! Will adopt it. > > > > > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > > --- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +++++- > > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > > index cde3c5616f9bc..a8b01b78c02c7 100644 > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > > > @@ -316,7 +316,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, > > > if (!rm->mixer_blks[i]) > > > continue; > > > > > > - lm_count = 0; > > > + /* > > > + * Clear the last bit to drop the previous primary mixer if > > > + * fail to find its peer. > > > > Same here can we reword it to something like "Reset lm_count to an even > > index. This will drop the previous primary mixer if ..." > > Will do. > > > > > > + */ > > > + lm_count &= 0xfe; > > > > Nit: Can we directly clear the first bit instead of doing an 8-bit bitmask? > > Could you elaborate on it? Or you are suggesting to mask 0xFFFFFFFE? I assume it is &= ~1 > > - Jun > > > > > Thanks, > > > > Jessica Zhang > > > > > lm_idx[lm_count] = i; > > > > > > if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state, > > > > > > -- > > > 2.34.1 > > > > >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index cde3c5616f9bc..a8b01b78c02c7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -316,7 +316,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, if (!rm->mixer_blks[i]) continue; - lm_count = 0; + /* + * Clear the last bit to drop the previous primary mixer if + * fail to find its peer. + */ + lm_count &= 0xfe; lm_idx[lm_count] = i; if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,
Add the case to reserve multiple pairs mixers for high resolution. Current code only supports one pair of mixer usage case. To support quad-pipe usage case, two pairs of mixers are needed. Current code resets number of mixer on failure of pair's peer test and retry on another pair. If two pairs are needed, the failure on the test of 2nd pair results clearing to the 1st pair. This patch only clear the bit for the 2nd pair allocation before retry on another pair. Signed-off-by: Jun Nie <jun.nie@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)