| Message ID | 20241212-correct_gpio_ranges-v1-4-c5f20d61882f@quicinc.com |
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From: Lijuan Gao <quic_lijuang@quicinc.com>
Date: Thu, 12 Dec 2024 17:24:03 +0800
Subject: [PATCH 4/6] pinctrl: qcom: correct the number of ngpios for
QCS8300
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| Series |
Correct the number of GPIOs in gpio-ranges for QCS615 and QCS8300
|
expand
|
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs8300.c b/drivers/pinctrl/qcom/pinctrl-qcs8300.c index ba6de944a859..5f5f7c4ac644 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs8300.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs8300.c @@ -1204,7 +1204,7 @@ static const struct msm_pinctrl_soc_data qcs8300_pinctrl = { .nfunctions = ARRAY_SIZE(qcs8300_functions), .groups = qcs8300_groups, .ngroups = ARRAY_SIZE(qcs8300_groups), - .ngpios = 133, + .ngpios = 134, .wakeirq_map = qcs8300_pdc_map, .nwakeirq_map = ARRAY_SIZE(qcs8300_pdc_map), .egpio_func = 11,
The UFS_RESET pin is expected to be wired to the reset pin of the primary UFS memory. Reorder the pins and expose it as a GPIO, so that the UFS driver can toggle it. Therefore, correct the number of ngpios. Fixes: 0c4cd2cc87c8 ("pinctrl: qcom: add the tlmm driver for QCS8300 platforms") Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> --- drivers/pinctrl/qcom/pinctrl-qcs8300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)