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a=openpgp-sha256; l=14070; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=tpv4ZW6nIW6oE8mQq2hXksopI+ZIgRq+r6Y0r/coN+A=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnTYauKHBaeuqVwuRNfxrmTHUuKDmSZgtGsNy3n lJ45IaK94mJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ02GrgAKCRCLPIo+Aiko 1XZqB/wIzlGv2Gz6Au3gkncVi5U6F2hQkqb+FwJiS4r0WUNW7pLVIvFdXu2l7g5hkHKcQLOU6iA bL7SkRh2hhiI7hlff/bn3k+eCtvqhepNIVFhuGMxUodH9/SWdFIMAsUFMycT/E2NjtVHn6naS+7 sfh6Z6N+K/bLky6UGfyvzphO7gvF8oj8z1HOuwp8N6fJbOZOmockX7rMG5Y8IlBHi4tYSFSx45V hdae6H5WLaffXG0ya/W3El6e1iI0Rydw7HmS84cVYLojBBRkKRQ8aTVR0Gn2g3Ql1qT71t4qNYU T/rlZoYY4TIU0KzjfgR1QQSa1GTRZErpIwB9g5e/sA0ye2zI X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Move several misnamed functions accessing AUX bus to dp_aux.c, further cleaning up dp_catalog submodule. Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/gpu/drm/msm/dp/dp_aux.c | 88 ++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/msm/dp/dp_aux.h | 7 +++ drivers/gpu/drm/msm/dp/dp_catalog.c | 75 +------------------------------ drivers/gpu/drm/msm/dp/dp_catalog.h | 6 --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 4 +- drivers/gpu/drm/msm/dp/dp_display.c | 18 ++++---- drivers/gpu/drm/msm/dp/dp_panel.c | 2 +- 7 files changed, 107 insertions(+), 93 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c index 46e8a2e13ac1d1249fbad9b50a6d64c52d51cf38..7228955019b31f80257b86a470c9ef305b2549a0 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.c +++ b/drivers/gpu/drm/msm/dp/dp_aux.c @@ -405,7 +405,7 @@ static ssize_t msm_dp_aux_transfer(struct drm_dp_aux *msm_dp_aux, phy_calibrate(aux->phy); } /* reset aux if link is in connected state */ - if (msm_dp_catalog_link_is_connected(aux->catalog)) + if (msm_dp_aux_is_link_connected(msm_dp_aux)) msm_dp_aux_reset(aux); } else { aux->retry_cnt = 0; @@ -593,6 +593,92 @@ static int msm_dp_wait_hpd_asserted(struct drm_dp_aux *msm_dp_aux, return ret; } +void msm_dp_aux_hpd_enable(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + u32 reg; + + /* Configure REFTIMER and enable it */ + reg = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER); + reg |= DP_DP_HPD_REFTIMER_ENABLE; + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER, reg); + + /* Enable HPD */ + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_CTRL, DP_DP_HPD_CTRL_HPD_EN); +} + +void msm_dp_aux_hpd_disable(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + u32 reg; + + reg = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER); + reg &= ~DP_DP_HPD_REFTIMER_ENABLE; + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER, reg); + + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_CTRL, 0); +} + +void msm_dp_aux_hpd_intr_enable(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + u32 reg; + + reg = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK); + reg |= DP_DP_HPD_INT_MASK; + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK, + reg & DP_DP_HPD_INT_MASK); +} + +void msm_dp_aux_hpd_intr_disable(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + u32 reg; + + reg = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK); + reg &= ~DP_DP_HPD_INT_MASK; + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK, + reg & DP_DP_HPD_INT_MASK); +} + +u32 msm_dp_aux_get_hpd_intr_status(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + int isr, mask; + + isr = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_STATUS); + msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_ACK, + (isr & DP_DP_HPD_INT_MASK)); + mask = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK); + + /* + * We only want to return interrupts that are unmasked to the caller. + * However, the interrupt status field also contains other + * informational bits about the HPD state status, so we only mask + * out the part of the register that tells us about which interrupts + * are pending. + */ + return isr & (mask | ~DP_DP_HPD_INT_MASK); +} + +u32 msm_dp_aux_is_link_connected(struct drm_dp_aux *msm_dp_aux) +{ + struct msm_dp_aux_private *aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); + struct msm_dp_catalog *msm_dp_catalog = aux->catalog; + u32 status; + + status = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_STATUS); + status >>= DP_DP_HPD_STATE_STATUS_BITS_SHIFT; + status &= DP_DP_HPD_STATE_STATUS_BITS_MASK; + + return status; +} + struct drm_dp_aux *msm_dp_aux_get(struct device *dev, struct msm_dp_catalog *catalog, struct phy *phy, bool is_edp) diff --git a/drivers/gpu/drm/msm/dp/dp_aux.h b/drivers/gpu/drm/msm/dp/dp_aux.h index 39c5b4c8596ab28d822493a6b4d479f5f786cdee..624395a41ed0a75ead4826e78d05ca21e8fb8967 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.h +++ b/drivers/gpu/drm/msm/dp/dp_aux.h @@ -17,6 +17,13 @@ void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux); void msm_dp_aux_deinit(struct drm_dp_aux *msm_dp_aux); void msm_dp_aux_reconfig(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_hpd_enable(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_hpd_disable(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_hpd_intr_enable(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_hpd_intr_disable(struct drm_dp_aux *msm_dp_aux); +u32 msm_dp_aux_get_hpd_intr_status(struct drm_dp_aux *msm_dp_aux); +u32 msm_dp_aux_is_link_connected(struct drm_dp_aux *msm_dp_aux); + struct phy; struct drm_dp_aux *msm_dp_aux_get(struct device *dev, struct msm_dp_catalog *catalog, struct phy *phy, diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 60ba6e0a204f536fd050591e891add17d286fb2d..754b30e35039618453df9ce863c0d2561fce2fda 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -81,8 +81,8 @@ u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog) intr &= ~DP_INTERRUPT_STATUS1_MASK; intr_ack = (intr & DP_INTERRUPT_STATUS1) << DP_INTERRUPT_STATUS_ACK_SHIFT; - msm_dp_write_ahb(msm_dp_catalog, REG_DP_INTR_STATUS, intr_ack | - DP_INTERRUPT_STATUS1_MASK); + msm_dp_write_ahb(msm_dp_catalog, REG_DP_INTR_STATUS, + intr_ack | DP_INTERRUPT_STATUS1_MASK); return intr; @@ -115,77 +115,6 @@ void msm_dp_catalog_ctrl_enable_irq(struct msm_dp_catalog *msm_dp_catalog, } } -void msm_dp_catalog_hpd_config_intr(struct msm_dp_catalog *msm_dp_catalog, - u32 intr_mask, bool en) -{ - struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog, - struct msm_dp_catalog_private, msm_dp_catalog); - - u32 config = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK); - - config = (en ? config | intr_mask : config & ~intr_mask); - - drm_dbg_dp(catalog->drm_dev, "intr_mask=%#x config=%#x\n", - intr_mask, config); - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK, - config & DP_DP_HPD_INT_MASK); -} - -void msm_dp_catalog_ctrl_hpd_enable(struct msm_dp_catalog *msm_dp_catalog) -{ - u32 reftimer = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER); - - /* Configure REFTIMER and enable it */ - reftimer |= DP_DP_HPD_REFTIMER_ENABLE; - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER, reftimer); - - /* Enable HPD */ - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_CTRL, DP_DP_HPD_CTRL_HPD_EN); -} - -void msm_dp_catalog_ctrl_hpd_disable(struct msm_dp_catalog *msm_dp_catalog) -{ - u32 reftimer = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER); - - reftimer &= ~DP_DP_HPD_REFTIMER_ENABLE; - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_REFTIMER, reftimer); - - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_CTRL, 0); -} - -u32 msm_dp_catalog_link_is_connected(struct msm_dp_catalog *msm_dp_catalog) -{ - struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog, - struct msm_dp_catalog_private, msm_dp_catalog); - u32 status; - - status = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_STATUS); - drm_dbg_dp(catalog->drm_dev, "aux status: %#x\n", status); - status >>= DP_DP_HPD_STATE_STATUS_BITS_SHIFT; - status &= DP_DP_HPD_STATE_STATUS_BITS_MASK; - - return status; -} - -u32 msm_dp_catalog_hpd_get_intr_status(struct msm_dp_catalog *msm_dp_catalog) -{ - int isr, mask; - - isr = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_STATUS); - msm_dp_write_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_ACK, - (isr & DP_DP_HPD_INT_MASK)); - mask = msm_dp_read_aux(msm_dp_catalog, REG_DP_DP_HPD_INT_MASK); - - /* - * We only want to return interrupts that are unmasked to the caller. - * However, the interrupt status field also contains other - * informational bits about the HPD state status, so we only mask - * out the part of the register that tells us about which interrupts - * are pending. - */ - return isr & (mask | ~DP_DP_HPD_INT_MASK); -} - u32 msm_dp_catalog_ctrl_read_psr_interrupt_status(struct msm_dp_catalog *msm_dp_catalog) { u32 intr, intr_ack; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index e2fdccc332f874458709593c68a1d1a46b6cc406..830d9164188c0f7520809a99fa409b473bbfbfa4 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -122,12 +122,6 @@ u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog); /* DP Controller APIs */ u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog); void msm_dp_catalog_ctrl_enable_irq(struct msm_dp_catalog *msm_dp_catalog, bool enable); -void msm_dp_catalog_hpd_config_intr(struct msm_dp_catalog *msm_dp_catalog, - u32 intr_mask, bool en); -void msm_dp_catalog_ctrl_hpd_enable(struct msm_dp_catalog *msm_dp_catalog); -void msm_dp_catalog_ctrl_hpd_disable(struct msm_dp_catalog *msm_dp_catalog); -u32 msm_dp_catalog_link_is_connected(struct msm_dp_catalog *msm_dp_catalog); -u32 msm_dp_catalog_hpd_get_intr_status(struct msm_dp_catalog *msm_dp_catalog); int msm_dp_catalog_ctrl_get_interrupt(struct msm_dp_catalog *msm_dp_catalog); void msm_dp_catalog_ctrl_config_psr_interrupt(struct msm_dp_catalog *msm_dp_catalog); u32 msm_dp_catalog_ctrl_read_psr_interrupt_status(struct msm_dp_catalog *msm_dp_catalog); diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index cde667bf8eeec95035b2feb3661686c99acf5b7d..5f32ee2fa0438cd12726540a59ab4849d47ee8c2 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -2162,7 +2162,7 @@ int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl) break; } else if (training_step == DP_TRAINING_1) { /* link train_1 failed */ - if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) + if (!msm_dp_aux_is_link_connected(ctrl->aux)) break; msm_dp_ctrl_read_link_status(ctrl, link_status); @@ -2187,7 +2187,7 @@ int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl) } } else if (training_step == DP_TRAINING_2) { /* link train_2 failed */ - if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) + if (!msm_dp_aux_is_link_connected(ctrl->aux)) break; msm_dp_ctrl_read_link_status(ctrl, link_status); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index aba925aab7ad7c6652e81004043864c1cb3ac370..72a46e9e319486bc4ec1f5c842d733bd55ce0a67 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1145,7 +1145,7 @@ static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) return IRQ_NONE; } - hpd_isr_status = msm_dp_catalog_hpd_get_intr_status(dp->catalog); + hpd_isr_status = msm_dp_aux_get_hpd_intr_status(dp->aux); if (hpd_isr_status & 0x0F) { drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", @@ -1360,7 +1360,7 @@ static int msm_dp_pm_runtime_suspend(struct device *dev) if (dp->msm_dp_display.is_edp) { msm_dp_display_host_phy_exit(dp); - msm_dp_catalog_ctrl_hpd_disable(dp->catalog); + msm_dp_aux_hpd_disable(dp->aux); } msm_dp_display_host_deinit(dp); @@ -1381,7 +1381,7 @@ static int msm_dp_pm_runtime_resume(struct device *dev) */ msm_dp_display_host_init(dp); if (dp->msm_dp_display.is_edp) { - msm_dp_catalog_ctrl_hpd_enable(dp->catalog); + msm_dp_aux_hpd_enable(dp->aux); msm_dp_display_host_phy_init(dp); } @@ -1668,10 +1668,8 @@ void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) return; } - msm_dp_catalog_ctrl_hpd_enable(dp->catalog); - - /* enable HDP interrupts */ - msm_dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, true); + msm_dp_aux_hpd_enable(dp->aux); + msm_dp_aux_hpd_intr_enable(dp->aux); msm_dp_display->internal_hpd = true; mutex_unlock(&dp->event_mutex); @@ -1684,9 +1682,9 @@ void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge) struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); mutex_lock(&dp->event_mutex); - /* disable HDP interrupts */ - msm_dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, false); - msm_dp_catalog_ctrl_hpd_disable(dp->catalog); + + msm_dp_aux_hpd_intr_disable(dp->aux); + msm_dp_aux_hpd_disable(dp->aux); msm_dp_display->internal_hpd = false; diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c index cd91de21c8e658570b8d43251ef815981f801ae4..25869e2ac93aba0bffeddae9f95917d81870d8cb 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -165,7 +165,7 @@ int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel, if (!msm_dp_panel->drm_edid) { DRM_ERROR("panel edid read failed\n"); /* check edid read fail is due to unplug */ - if (!msm_dp_catalog_link_is_connected(panel->catalog)) { + if (!msm_dp_aux_is_link_connected(panel->aux)) { rc = -ETIMEDOUT; goto end; }