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a=openpgp-sha256; l=910; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=rR33tk4iShQizxX1vNrKanPGs6fsj3vgKiMhLvDMp+M=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnSm3zc0cOtxzcV+s0AdlejbFKfCk3MoBgg7lHI mdE/TXRJr+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ0pt8wAKCRCLPIo+Aiko 1QlOB/9R4WPOD5FR9qjxe/CCeC1L3cVvKs+q7z4z2LeVjql5LDA9RaD3lDajRH60NKnYbzwbnBT MucSphWrWWsOspuOnFPcgfOnMM2G1pdxD0O4Yzen7I4gt1Tin1CmYCCHIe45ubo6b0VF4Yquzpb QfHHcfrf8aa8gl4bXrbLZ1djLrGH9/TzmVdbEOe5mRWxfOjJTM05jTY9u+vsL2+dATs2TM5j9gM iPmyfNPf0w/P/eNLj+XF7rH2+pYRmvzuZkSs9lXzdNvXt3GQcdOPe/koeGwXVQyjc4tbI5LDURc 5fgr32id6mSgRNJrQ4AUle2qb/orjv6JI1M/Dr4+8EWiJoml X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The QCS40x platforms use PMS405 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 9181bb939984 ("arm64: dts: qcom: Add SDX75 platform and IDP board support") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 215ba146207afd25128692781926cf1964743655..2862474f33b0eab7c42fa2b22006f580c567ad2e 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -28,7 +28,7 @@ xo_board: xo-board { sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + clock-frequency = <32764>; }; };