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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53dd24953a1sm2276621e87.228.2024.11.27.04.30.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2024 04:30:02 -0800 (PST) From: Vladimir Zapolskiy To: Bjorn Andersson , Konrad Dybcio Cc: Robert Foss , Todor Tomov , Bryan O'Donoghue , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Johan Hovold Subject: [PATCH v3 4/6] arm64: dts: qcom: sc8280xp: Fix interrupt type of camss interrupts Date: Wed, 27 Nov 2024 14:29:48 +0200 Message-ID: <20241127122950.885982-5-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241127122950.885982-1-vladimir.zapolskiy@linaro.org> References: <20241127122950.885982-1-vladimir.zapolskiy@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Qualcomm IP catalog says that all CAMSS interrupts are edge rising, fix it in the CAMSS device tree node for sc8280xp SoC. Fixes: 5994dd60753e ("arm64: dts: qcom: sc8280xp: camss: Add CAMSS block definition") Signed-off-by: Vladimir Zapolskiy Reviewed-by: Bryan O'Donoghue Tested-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 +++++++++++++------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index ef06d1ac084d..6722134aebc9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3900,26 +3900,26 @@ camss: camss@ac5a000 { "vfe3", "csid3"; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; interrupt-names = "csid1_lite", "vfe_lite1", "csiphy3",