| Message ID | 20241017144500.3968797-3-quic_yrangana@quicinc.com |
|---|---|
| State | Accepted |
| Commit | 7ff3da43ef4453a6295bf82cb942168414043119 |
| Headers | show |
| Series | Add QCrypto support for SA8775P | expand |
On Thu, Oct 17, 2024 at 9:45 AM Yuvaraj Ranganathan <quic_yrangana@quicinc.com> wrote: > > Add the QCE and Crypto BAM DMA nodes. > > Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index e8dbc8d820a6..c1c53f81a555 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -1912,6 +1912,28 @@ ice: crypto@1d88000 { > clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; > }; > > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > + reg = <0x0 0x01dc4000 0x0 0x28000>; > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + iommus = <&apps_smmu 0x480 0x00>, > + <&apps_smmu 0x481 0x00>; > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,sa8775p-qce", "qcom,qce"; This one also doesn't match the schema...
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index e8dbc8d820a6..c1c53f81a555 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -1912,6 +1912,28 @@ ice: crypto@1d88000 { clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0x0 0x01dc4000 0x0 0x28000>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x480 0x00>, + <&apps_smmu 0x481 0x00>; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sa8775p-qce", "qcom,qce"; + reg = <0x0 0x01dfa000 0x0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x480 0x00>, + <&apps_smmu 0x481 0x00>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "memory"; + }; + stm: stm@4002000 { compatible = "arm,coresight-stm", "arm,primecell"; reg = <0x0 0x4002000 0x0 0x1000>,
Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)