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Tue, 15 Oct 2024 18:28:02 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 15 Oct 2024 11:27:58 -0700 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , "Bjorn Andersson" , Konrad Dybcio , , , , Balamurugan S , "P Praneesh" , Raj Kumar Bhagat Subject: [PATCH v2 10/22] wifi: ath12k: add new CMEM read-write ath12k_hif_ops Date: Tue, 15 Oct 2024 23:56:25 +0530 Message-ID: <20241015182637.955753-11-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241015182637.955753-1-quic_rajkbhag@quicinc.com> References: <20241015182637.955753-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _VQ2Nlhj6gBLDGGKw0gwLUd-YQR6VbZx X-Proofpoint-GUID: _VQ2Nlhj6gBLDGGKw0gwLUd-YQR6VbZx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 adultscore=0 lowpriorityscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 suspectscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410150125 From: Balamurugan S In IPQ5332 AHB device, CMEM region is outside of WCSS register block. Hence, add new ath12k_hif_ops (cmem_read32 and cmem_write32) for accessing CMEM register. In PCI devices (QCN9274 and WCN7850), these cmem_read32/cmem_write32 are same as read32/write32 ath12k_hif_ops. Hence, use the same functions for these new ath12k_hif_ops cmem_read32/cmem_write32. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1 Signed-off-by: Balamurugan S Co-developed-by: P Praneesh Signed-off-by: P Praneesh Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/dp.c | 10 ++++++---- drivers/net/wireless/ath/ath12k/hif.h | 13 +++++++++++++ drivers/net/wireless/ath/ath12k/pci.c | 2 ++ 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/dp.c b/drivers/net/wireless/ath/ath12k/dp.c index 2ab2a7d45be9..1e9139923838 100644 --- a/drivers/net/wireless/ath/ath12k/dp.c +++ b/drivers/net/wireless/ath/ath12k/dp.c @@ -1474,7 +1474,7 @@ static int ath12k_dp_cmem_init(struct ath12k_base *ab, struct ath12k_dp *dp, enum ath12k_dp_desc_type type) { - u32 cmem_base; + u32 cmem_base, data; int i, start, end; cmem_base = ab->qmi.dev_mem[ATH12K_QMI_DEVMEM_CMEM_INDEX].start; @@ -1495,9 +1495,11 @@ static int ath12k_dp_cmem_init(struct ath12k_base *ab, } /* Write to PPT in CMEM */ - for (i = start; i < end; i++) - ath12k_hif_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i), - dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET); + for (i = start; i < end; i++) { + data = dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET; + ath12k_hif_cmem_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i), + data); + } return 0; } diff --git a/drivers/net/wireless/ath/ath12k/hif.h b/drivers/net/wireless/ath/ath12k/hif.h index 0e53ec269fa4..44e42065b551 100644 --- a/drivers/net/wireless/ath/ath12k/hif.h +++ b/drivers/net/wireless/ath/ath12k/hif.h @@ -12,6 +12,8 @@ struct ath12k_hif_ops { u32 (*read32)(struct ath12k_base *ab, u32 address); void (*write32)(struct ath12k_base *ab, u32 address, u32 data); + u32 (*cmem_read32)(struct ath12k_base *sc, u32 address); + void (*cmem_write32)(struct ath12k_base *sc, u32 address, u32 data); void (*irq_enable)(struct ath12k_base *ab); void (*irq_disable)(struct ath12k_base *ab); int (*start)(struct ath12k_base *ab); @@ -132,6 +134,17 @@ static inline void ath12k_hif_write32(struct ath12k_base *ab, u32 address, ab->hif.ops->write32(ab, address, data); } +static inline u32 ath12k_hif_cmem_read32(struct ath12k_base *ab, u32 address) +{ + return ab->hif.ops->cmem_read32(ab, address); +} + +static inline void ath12k_hif_cmem_write32(struct ath12k_base *ab, u32 address, + u32 data) +{ + ab->hif.ops->cmem_write32(ab, address, data); +} + static inline int ath12k_hif_power_up(struct ath12k_base *ab) { if (!ab->hif.ops->power_up) diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c index bd269aa1740b..0c393bc30f92 100644 --- a/drivers/net/wireless/ath/ath12k/pci.c +++ b/drivers/net/wireless/ath/ath12k/pci.c @@ -1316,6 +1316,8 @@ static const struct ath12k_hif_ops ath12k_pci_hif_ops = { .stop = ath12k_pci_stop, .read32 = ath12k_pci_read32, .write32 = ath12k_pci_write32, + .cmem_read32 = ath12k_pci_read32, + .cmem_write32 = ath12k_pci_write32, .power_down = ath12k_pci_power_down, .power_up = ath12k_pci_power_up, .suspend = ath12k_pci_hif_suspend,