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[v8,3/3] arm64: dts: qcom: sa8775p: extend the register range for UFS ICE

Message ID 20241007-wrapped-keys-dts-v8-3-05ee041f2fc1@linaro.org
State New
Headers show
Series [v8,1/3] arm64: dts: qcom: sm8650: extend the register range for UFS ICE | expand

Commit Message

Bartosz Golaszewski Oct. 7, 2024, 10:02 a.m. UTC 
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

The full register range for ICE on sa8775p is 0x18000 so update the
crypto node.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index e8dbc8d820a6..82099d7d0472 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -1908,7 +1908,7 @@  ufs_mem_phy: phy@1d87000 {
 		ice: crypto@1d88000 {
 			compatible = "qcom,sa8775p-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
-			reg = <0x0 0x01d88000 0x0 0x8000>;
+			reg = <0x0 0x01d88000 0x0 0x18000>;
 			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
 		};