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Thu, 29 Aug 2024 03:19:15 -0700 (PDT) Received: from [127.0.1.1] ([112.65.12.167]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7d22e9d4df4sm891684a12.82.2024.08.29.03.19.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Aug 2024 03:19:14 -0700 (PDT) From: Jun Nie Date: Thu, 29 Aug 2024 18:17:30 +0800 Subject: [PATCH 01/21] drm/msm/dsi: add support to DSI CTRL v2.8.0 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-1-bdb05b4b5a2e@linaro.org> References: <20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5a2e@linaro.org> In-Reply-To: <20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5a2e@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jun Nie , Jonathan Marek X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1724926736; l=1217; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=C1k3RPwM6WNScuAGLeEJNZ/C8SUXvF2SN04fTyxqBC4=; b=IL2p1n//a/cGjDAbXalP8f4Wm6zhrPhNJ5sIDGMkYy4qtn/Aw3KFCQjztAspCIV9D1mB87nyE sNLBBVEeWJmDVH9l6gal907ZbTHPctNj7XlZo4S7aFE/u3f8VHrLul4 X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= From: Jonathan Marek Add support to DSI CTRL v2.8.0 with priority support Signed-off-by: Jun Nie --- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 185d7de0bf376..6388bb12696ff 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -2238,13 +2238,23 @@ int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host, return ret; } +#define DSI_VBIF_CTRL (0x01CC - 4) +#define DSI_VBIF_CTRL_PRIORITY 0x07 + void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, u32 dma_base, u32 len) { struct msm_dsi_host *msm_host = to_msm_dsi_host(host); + const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; + u32 reg; dsi_write(msm_host, REG_DSI_DMA_BASE, dma_base); dsi_write(msm_host, REG_DSI_DMA_LEN, len); + if (cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_8_0) { + reg = dsi_read(msm_host, DSI_VBIF_CTRL); + reg |= (DSI_VBIF_CTRL_PRIORITY & 0x7); + dsi_write(msm_host, DSI_VBIF_CTRL, reg); + } dsi_write(msm_host, REG_DSI_TRIG_DMA, 1); /* Make sure trigger happens */