@@ -10,6 +10,7 @@
#include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
#include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -564,6 +565,121 @@ cpucp_fw_mem: cpucp-fw@db200000 {
};
};
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ smp2p_adsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_adsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-cdsp0 {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ smp2p_cdsp0_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_cdsp0_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-cdsp1 {
+ compatible = "qcom,smp2p";
+ qcom,smem = <617>, <616>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_NSP1 IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <12>;
+
+ smp2p_cdsp1_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_cdsp1_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-gpdsp0 {
+ compatible = "qcom,smp2p";
+ qcom,smem = <617>, <616>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_GPDSP0 IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <17>;
+
+ smp2p_gpdsp0_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_gpdsp0_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-gpdsp1 {
+ compatible = "qcom,smp2p";
+ qcom,smem = <617>, <616>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_GPDSP1 IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <18>;
+
+ smp2p_gpdsp1_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_gpdsp1_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <2>;
@@ -3447,6 +3563,92 @@ cpufreq_hw: cpufreq@18591000 {
#freq-domain-cells = <1>;
};
+ remoteproc_gpdsp0: remoteproc@20c00000 {
+ compatible = "qcom,sa8775p-gpdsp0-pas";
+ reg = <0x0 0x20c00000 0x0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_gpdsp0_in 0 0>,
+ <&smp2p_gpdsp0_in 2 0>,
+ <&smp2p_gpdsp0_in 1 0>,
+ <&smp2p_gpdsp0_in 3 0>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "cx", "mxc";
+
+ interconnects = <&gpdsp_anoc MASTER_DSP0 0
+ &config_noc SLAVE_CLK_CTL 0>;
+
+ memory-region = <&pil_gdsp0_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_gpdsp0_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_GPDSP0
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "gpdsp0";
+ qcom,remote-pid = <17>;
+ };
+ };
+
+ remoteproc_gpdsp1: remoteproc@21c00000 {
+ compatible = "qcom,sa8775p-gpdsp1-pas";
+ reg = <0x0 0x21c00000 0x0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_gpdsp1_in 0 0>,
+ <&smp2p_gpdsp1_in 2 0>,
+ <&smp2p_gpdsp1_in 1 0>,
+ <&smp2p_gpdsp1_in 3 0>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "cx", "mxc";
+
+ interconnects = <&gpdsp_anoc MASTER_DSP1 0
+ &config_noc SLAVE_CLK_CTL 0>;
+
+ memory-region = <&pil_gdsp1_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_gpdsp1_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_GPDSP1
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "gpdsp1";
+ qcom,remote-pid = <18>;
+ };
+ };
+
ethernet1: ethernet@23000000 {
compatible = "qcom,sa8775p-ethqos";
reg = <0x0 0x23000000 0x0 0x10000>,
@@ -3528,6 +3730,352 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
status = "disabled";
};
+
+ remoteproc_cdsp0: remoteproc@26300000 {
+ compatible = "qcom,sa8775p-cdsp0-pas";
+ reg = <0x0 0x26300000 0x0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp0_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp0_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp0_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp0_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_NSP0>;
+ power-domain-names = "cx", "mxc", "nsp";
+
+ interconnects = <&nspa_noc MASTER_CDSP_PROC 0
+ &mc_virt SLAVE_EBI1 0>;
+
+ memory-region = <&pil_cdsp0_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_cdsp0_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "cdsp";
+ qcom,remote-pid = <5>;
+ };
+ };
+
+ remoteproc_cdsp1: remoteproc@2a300000 {
+ compatible = "qcom,sa8775p-cdsp1-pas";
+ reg = <0x0 0x2A300000 0x0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp1_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp1_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp1_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp1_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_NSP1>;
+ power-domain-names = "cx", "mxc", "nsp";
+
+ interconnects = <&nspb_noc MASTER_CDSP_PROC_B 0
+ &mc_virt SLAVE_EBI1 0>;
+
+ memory-region = <&pil_cdsp1_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_cdsp1_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_NSP1
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "cdsp";
+ qcom,remote-pid = <12>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "cdsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x2941 0x04a0>,
+ <&apps_smmu 0x2961 0x04a0>,
+ <&apps_smmu 0x2981 0x0400>,
+ <&apps_smmu 0x29c1 0x04a0>,
+ <&apps_smmu 0x29e1 0x04a0>,
+ <&apps_smmu 0x2d41 0x04a0>,
+ <&apps_smmu 0x2d61 0x04a0>,
+ <&apps_smmu 0x2d81 0x0400>,
+ <&apps_smmu 0x2dc1 0x04a0>,
+ <&apps_smmu 0x2de1 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x2942 0x04a0>,
+ <&apps_smmu 0x2962 0x04a0>,
+ <&apps_smmu 0x2982 0x0400>,
+ <&apps_smmu 0x29c2 0x04a0>,
+ <&apps_smmu 0x29e2 0x04a0>,
+ <&apps_smmu 0x2d42 0x04a0>,
+ <&apps_smmu 0x2d62 0x04a0>,
+ <&apps_smmu 0x2d82 0x0400>,
+ <&apps_smmu 0x2dc2 0x04a0>,
+ <&apps_smmu 0x2de2 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x2943 0x04a0>,
+ <&apps_smmu 0x2963 0x04a0>,
+ <&apps_smmu 0x2983 0x0400>,
+ <&apps_smmu 0x29c3 0x04a0>,
+ <&apps_smmu 0x29e3 0x04a0>,
+ <&apps_smmu 0x2d43 0x04a0>,
+ <&apps_smmu 0x2d63 0x04a0>,
+ <&apps_smmu 0x2d83 0x0400>,
+ <&apps_smmu 0x2dc3 0x04a0>,
+ <&apps_smmu 0x2de3 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x2944 0x04a0>,
+ <&apps_smmu 0x2964 0x04a0>,
+ <&apps_smmu 0x2984 0x0400>,
+ <&apps_smmu 0x29c4 0x04a0>,
+ <&apps_smmu 0x29e4 0x04a0>,
+ <&apps_smmu 0x2d44 0x04a0>,
+ <&apps_smmu 0x2d64 0x04a0>,
+ <&apps_smmu 0x2d84 0x0400>,
+ <&apps_smmu 0x2dc4 0x04a0>,
+ <&apps_smmu 0x2de4 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x2945 0x04a0>,
+ <&apps_smmu 0x2965 0x04a0>,
+ <&apps_smmu 0x2985 0x0400>,
+ <&apps_smmu 0x29c5 0x04a0>,
+ <&apps_smmu 0x29e5 0x04a0>,
+ <&apps_smmu 0x2d45 0x04a0>,
+ <&apps_smmu 0x2d65 0x04a0>,
+ <&apps_smmu 0x2d85 0x0400>,
+ <&apps_smmu 0x2dc5 0x04a0>,
+ <&apps_smmu 0x2de5 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x2946 0x04a0>,
+ <&apps_smmu 0x2966 0x04a0>,
+ <&apps_smmu 0x2986 0x0400>,
+ <&apps_smmu 0x29c6 0x04a0>,
+ <&apps_smmu 0x29e6 0x04a0>,
+ <&apps_smmu 0x2d46 0x04a0>,
+ <&apps_smmu 0x2d66 0x04a0>,
+ <&apps_smmu 0x2d86 0x0400>,
+ <&apps_smmu 0x2dc6 0x04a0>,
+ <&apps_smmu 0x2de6 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+ iommus = <&apps_smmu 0x2947 0x04a0>,
+ <&apps_smmu 0x2967 0x04a0>,
+ <&apps_smmu 0x2987 0x0400>,
+ <&apps_smmu 0x29c7 0x04a0>,
+ <&apps_smmu 0x29e7 0x04a0>,
+ <&apps_smmu 0x2d47 0x04a0>,
+ <&apps_smmu 0x2d67 0x04a0>,
+ <&apps_smmu 0x2d87 0x0400>,
+ <&apps_smmu 0x2dc7 0x04a0>,
+ <&apps_smmu 0x2de7 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@8 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+ iommus = <&apps_smmu 0x2948 0x04a0>,
+ <&apps_smmu 0x2968 0x04a0>,
+ <&apps_smmu 0x2988 0x0400>,
+ <&apps_smmu 0x29c8 0x04a0>,
+ <&apps_smmu 0x29e8 0x04a0>,
+ <&apps_smmu 0x2d48 0x04a0>,
+ <&apps_smmu 0x2d68 0x04a0>,
+ <&apps_smmu 0x2d88 0x0400>,
+ <&apps_smmu 0x2dc8 0x04a0>,
+ <&apps_smmu 0x2de8 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@9 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <9>;
+ iommus = <&apps_smmu 0x2949 0x04a0>,
+ <&apps_smmu 0x2969 0x04a0>,
+ <&apps_smmu 0x2989 0x0400>,
+ <&apps_smmu 0x29c9 0x04a0>,
+ <&apps_smmu 0x29e9 0x04a0>,
+ <&apps_smmu 0x2d49 0x04a0>,
+ <&apps_smmu 0x2d69 0x04a0>,
+ <&apps_smmu 0x2d89 0x0400>,
+ <&apps_smmu 0x2dc9 0x04a0>,
+ <&apps_smmu 0x2de9 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@10 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <10>;
+ iommus = <&apps_smmu 0x294a 0x04a0>,
+ <&apps_smmu 0x296a 0x04a0>,
+ <&apps_smmu 0x298a 0x0400>,
+ <&apps_smmu 0x29ca 0x04a0>,
+ <&apps_smmu 0x29ea 0x04a0>,
+ <&apps_smmu 0x2d4a 0x04a0>,
+ <&apps_smmu 0x2d6a 0x04a0>,
+ <&apps_smmu 0x2d8a 0x0400>,
+ <&apps_smmu 0x2dca 0x04a0>,
+ <&apps_smmu 0x2dea 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@11 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
+ iommus = <&apps_smmu 0x294b 0x04a0>,
+ <&apps_smmu 0x296b 0x04a0>,
+ <&apps_smmu 0x298b 0x0400>,
+ <&apps_smmu 0x29cb 0x04a0>,
+ <&apps_smmu 0x29eb 0x04a0>,
+ <&apps_smmu 0x2d4b 0x04a0>,
+ <&apps_smmu 0x2d6b 0x04a0>,
+ <&apps_smmu 0x2d8b 0x0400>,
+ <&apps_smmu 0x2dcb 0x04a0>,
+ <&apps_smmu 0x2deb 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@12 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+ iommus = <&apps_smmu 0x294c 0x04a0>,
+ <&apps_smmu 0x296c 0x04a0>,
+ <&apps_smmu 0x298c 0x0400>,
+ <&apps_smmu 0x29cc 0x04a0>,
+ <&apps_smmu 0x29ec 0x04a0>,
+ <&apps_smmu 0x2d4c 0x04a0>,
+ <&apps_smmu 0x2d6c 0x04a0>,
+ <&apps_smmu 0x2d8c 0x0400>,
+ <&apps_smmu 0x2dcc 0x04a0>,
+ <&apps_smmu 0x2dec 0x04a0>;
+ dma-coherent;
+ };
+
+ compute-cb@13 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <13>;
+ iommus = <&apps_smmu 0x294d 0x04a0>,
+ <&apps_smmu 0x296d 0x04a0>,
+ <&apps_smmu 0x298d 0x0400>,
+ <&apps_smmu 0x29Cd 0x04a0>,
+ <&apps_smmu 0x29ed 0x04a0>,
+ <&apps_smmu 0x2d4d 0x04a0>,
+ <&apps_smmu 0x2d6d 0x04a0>,
+ <&apps_smmu 0x2d8d 0x0400>,
+ <&apps_smmu 0x2dcd 0x04a0>,
+ <&apps_smmu 0x2ded 0x04a0>;
+ dma-coherent;
+ };
+ };
+ };
+ };
+
+ remoteproc_adsp: remoteproc@30000000 {
+ compatible = "qcom,sa8775p-adsp-pas";
+ reg = <0x0 0x30000000 0x0 0x100>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_LCX>,
+ <&rpmhpd RPMHPD_LMX>;
+ power-domain-names = "lcx", "lmx";
+
+ interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
+
+ memory-region = <&pil_adsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ remoteproc_adsp_glink: glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ };
+ };
};
thermal-zones {