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[83.30.41.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4282bb64755sm25430985e9.36.2024.07.31.08.26.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Jul 2024 08:26:15 -0700 (PDT) From: Adam Skladowski Date: Wed, 31 Jul 2024 17:25:31 +0200 Subject: [PATCH v3 7/8] ASoC: qcom: apq8016_sbc: Add support for msm8976 SoC Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-msm8953-msm8976-asoc-v3-7-163f23c3a28d@gmail.com> References: <20240731-msm8953-msm8976-asoc-v3-0-163f23c3a28d@gmail.com> In-Reply-To: <20240731-msm8953-msm8976-asoc-v3-0-163f23c3a28d@gmail.com> To: Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Stephan Gerhold Cc: alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Adam Skladowski X-Mailer: b4 0.14.0 Introduce support for audio card on MSM8976 platform. While MSM8976 falls into v1 category with MSM8916, digitial codec clock is not available in GCC so we have to set it in machine driver. For that reason for V1 clocks new boolean is added to check if we need to enable codec clock. Signed-off-by: Adam Skladowski --- sound/soc/qcom/apq8016_sbc.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c index 3ed35beb671a..8219d4d55625 100644 --- a/sound/soc/qcom/apq8016_sbc.c +++ b/sound/soc/qcom/apq8016_sbc.c @@ -35,6 +35,7 @@ struct apq8016_sbc_data { struct snd_soc_jack jack; bool jack_setup; enum afe_clk_api q6afe_clk_ver; + bool dig_cdc_mclk_en; int mi2s_clk_count[MI2S_COUNT]; }; @@ -242,6 +243,16 @@ static int msm8916_qdsp6_startup(struct snd_pcm_substream *substream) if (++data->mi2s_clk_count[mi2s] > 1) return 0; + /* + * On newer legacy SoC (MSM8976) lpass codec clocks are not available in gcc region + * so we have to request clock from machine driver using V1 API) + */ + if (data->q6afe_clk_ver == Q6AFE_CLK_V1 && + data->dig_cdc_mclk_en) { + ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_DIG_CLK, DEFAULT_MCLK_RATE, 0); + if (ret) + dev_err(card->dev, "Failed to enable LPAIF dig clk: %d\n", ret); + } ret = snd_soc_dai_set_sysclk(cpu_dai, qdsp6_get_clk_id(data, mi2s), MI2S_BCLK_RATE, 0); if (ret) @@ -267,6 +278,13 @@ static void msm8916_qdsp6_shutdown(struct snd_pcm_substream *substream) ret = snd_soc_dai_set_sysclk(cpu_dai, qdsp6_get_clk_id(data, mi2s), 0, 0); if (ret) dev_err(card->dev, "Failed to disable LPAIF bit clk: %d\n", ret); + + if (data->q6afe_clk_ver == Q6AFE_CLK_V1 && + data->dig_cdc_mclk_en) { + ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_DIG_CLK, 0, 0); + if (ret) + dev_err(card->dev, "Failed to disable LPAIF dig clk: %d\n", ret); + } } static const struct snd_soc_ops msm8916_qdsp6_be_ops = { @@ -317,6 +335,15 @@ static void msm8953_qdsp6_add_ops(struct snd_soc_card *card) pdata->q6afe_clk_ver = Q6AFE_CLK_V2; } +static void msm8976_qdsp6_add_ops(struct snd_soc_card *card) +{ + struct apq8016_sbc_data *pdata = snd_soc_card_get_drvdata(card); + + msm8916_qdsp6_add_ops(card); + pdata->q6afe_clk_ver = Q6AFE_CLK_V1; + pdata->dig_cdc_mclk_en = true; +} + static const struct snd_kcontrol_new apq8016_sbc_snd_controls[] = { SOC_DAPM_PIN_SWITCH("Headphone Jack"), SOC_DAPM_PIN_SWITCH("Mic Jack"), @@ -383,6 +410,7 @@ static const struct of_device_id apq8016_sbc_device_id[] __maybe_unused = { { .compatible = "qcom,apq8016-sbc-sndcard", .data = apq8016_sbc_add_ops }, { .compatible = "qcom,msm8916-qdsp6-sndcard", .data = msm8916_qdsp6_add_ops }, { .compatible = "qcom,msm8953-qdsp6-sndcard", .data = msm8953_qdsp6_add_ops }, + { .compatible = "qcom,msm8976-qdsp6-sndcard", .data = msm8976_qdsp6_add_ops }, {}, }; MODULE_DEVICE_TABLE(of, apq8016_sbc_device_id);