From patchwork Fri Jul 19 13:17:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813449 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DF6E14389E; Fri, 19 Jul 2024 13:17:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=bujwivRO4ws5cxmqargoGci1zgb2YIPZnNBTCbQbneaxNCcNX/h8px/9MoCHbLKzxfylDgPDNI+dyBb5uFhwGTGqyxdbxbx+HjInTZOXtYLIHnVal1Eb8tH3aC8c+Zmd3L7UkGsqPgusNr7wE8rP+xpOUjL9RXVtMn+lzQaEUf0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=YYH8opMUUd+zWpYKTZwoee7J/eRstD8r4IR+x9aZND8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SUu146M1hM1HMGV9l3FzKCulwvxvIhRaHJkIzqp/HQvEs17IIbq07J93Nocy7M2hKclNSMzL9KwTWs3fSbNAC0R+iLiA8fZds4r8lwmKgxHIoak8JMrcneR3bCKyskXi1sb51JDo2SlYWV3pG+NyjnEi56qjdlD4zCYKr7LABAs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=q7zymWPa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="q7zymWPa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EECC0C4AF52; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395049; bh=YYH8opMUUd+zWpYKTZwoee7J/eRstD8r4IR+x9aZND8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q7zymWPak1EuBtWcl5R94skRGbd47xO3h1/dUU4Zt6Z39wCmrf10INcr++X0FAVkp p5F/ACUsGHIUn6j2DBVxIBpBNobNgtE0WZqcwUQDOGcwGwMpKmGUci+i4AGQ1XwZMV Me6gojYV2C2Pl+w/XHOTO130EWl/oecLf26X/EhQBPTmYBTjtm8QP8oePTkzoCsVA9 RJmi6D/PxITLiuVW+j2sUu1ONc7uR7rpaPd/3n8UuyQy74kV1Ai+gIO4XPSXCr224K p9CWUQn1qY16ps9gJ4W97bWU5meM+Z9maxvCnuiBpHkMf+2l4fhGlGJAJB5QlmUzgJ shX5XgE7HXrJg== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BQ-3uil; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 7/7] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem Date: Fri, 19 Jul 2024 15:17:22 +0200 Message-ID: <20240719131722.8343-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable PCIe5 and the SDX65 modem. Note that the modem may need to be flashed with firmware before use. Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 65 +++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 72d9feec907b..e7bc283a0da9 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -301,6 +301,22 @@ vreg_nvme: regulator-nvme { pinctrl-names = "default"; pinctrl-0 = <&nvme_reg_en>; }; + + vreg_wwan: regulator-wwan { + compatible = "regulator-fixed"; + + regulator-name = "SDX_VPH_PWR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wwan_sw_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -800,6 +816,25 @@ &pcie4_phy { status = "okay"; }; +&pcie5 { + perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wwan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie5_default>; + + status = "okay"; +}; + +&pcie5_phy { + vdda-phy-supply = <&vreg_l3i_0p8>; + vdda-pll-supply = <&vreg_l3e_1p2>; + + status = "okay"; +}; + &pcie6a { perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; @@ -1004,6 +1039,29 @@ wake-n-pins { }; }; + pcie5_default: pcie5-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie5_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio149"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; @@ -1055,6 +1113,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wwan_sw_en: wwan-sw-en-state { + pins = "gpio221"; + function = "gpio"; + drive-strength = <4>; + bias-disable; + }; }; &uart21 {