From patchwork Tue Jul 9 06:39:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 811550 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BBB312D1FA; Tue, 9 Jul 2024 06:40:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720507228; cv=none; b=ZO2NH+Ug8ilhLaou4/pgKc2qsqssiZA8Caj6v9vmFGj4aQzX8zWmPLLGF3wqHuG41S6wlMXHWFauo/gGz1CagRLowiQNDtwj8QgCX4ElObAlC8WNzMqqvDDNAisKeTJVrUoK7PFWcndP2hi51wMaTc6ZFXbk1YLK12nxptV/shk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720507228; c=relaxed/simple; bh=4pTCx04Ow1ak7H8ibjJ9eGBOb8qZUninCpgsUWd3V9g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r+cRb3dHcpEnkKMbTL1jsznUokHQc+SMG3Ig86zbRLEuqCDjP0f93DM3NDbnNicqPIxxGfPnZCQBn7fwCr+SwniJJuyQUK8jepgL931pHaR0futdT4s4bxIp1V/MM/zsUZOsT8S/8J8t04hS7kVhk7Zp9qj0X+jQsP7FpX0B1Jk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=GYq6eBaM; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="GYq6eBaM" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 468MxNu8003205; Tue, 9 Jul 2024 06:40:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= urBmz58mVB0NIBsv1f9hjTMMozWLgnJQy5/O8ufXL9Y=; b=GYq6eBaM0pjKOl2+ KYkCHgiKOqOoyhqm7/vTmwNsIpD3iFWW81KPUXc5j8WInYjrHScc3p3nII5pfdNn o05JVYDC9ohrCbfDflzFs5tWApizIbmk+i0p4QPZSkjUxl3aW4fRMx6oPns3y4kq ZiFSN3ZCnpVwROIG8Yl+bB/HOWwPekRAUx2xrYfu1Z0pOEmVA17sN/VZ2CVAW0H1 2dXUhcWiw1PlrBDlO4SUIDhUbHTJzpg9FJMUEwISa7cgS9P3PRt/8ZACwbLE91LO oe910gBclm1rxFd4tbVV6mreFEmDHCaFwtJ957Vuq4jByhpmIL6TwKsCgSNeO5F7 IMBD9w== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 406x515pf9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 09 Jul 2024 06:40:22 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4696eL9F027378 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 9 Jul 2024 06:40:21 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 8 Jul 2024 23:40:17 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v1 3/3] arm64: dts: qcom: ipq5332: Add icc provider ability to gcc Date: Tue, 9 Jul 2024 12:09:48 +0530 Message-ID: <20240709063949.4127310-4-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240709063949.4127310-1-quic_varada@quicinc.com> References: <20240709063949.4127310-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YFf1urJHqHwwaZl-d5dpiq-qqDBST6OX X-Proofpoint-ORIG-GUID: YFf1urJHqHwwaZl-d5dpiq-qqDBST6OX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-08_15,2024-07-08_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 suspectscore=0 impostorscore=0 mlxlogscore=999 mlxscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407090043 IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 573656587c0d..7a39e66d51f1 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -208,6 +209,7 @@ gcc: clock-controller@1800000 { reg = <0x01800000 0x80000>; #clock-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; clocks = <&xo_board>, <&sleep_clk>, <0>,