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Fri, 14 Jun 2024 03:18:29 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ec05bf44c4sm5000241fa.9.2024.06.14.03.18.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 03:18:29 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 14 Jun 2024 13:18:27 +0300 Subject: [PATCH v3 4/5] arm64: dts: qcom: sm8550: drop second clock name from clock-output-names Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240614-fix-pcie-phy-compat-v3-4-730d1811acf4@linaro.org> References: <20240614-fix-pcie-phy-compat-v3-0-730d1811acf4@linaro.org> In-Reply-To: <20240614-fix-pcie-phy-compat-v3-0-730d1811acf4@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1027; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=KCN2eANWYAM84jA8/6xmT/BGXcDHwINY3x+bGOwx930=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmbBjxQDKgfgt86XMAJTyJakQrvV9cTkYPD2CnO AXdxPAEv2yJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZmwY8QAKCRCLPIo+Aiko 1bCyB/0eNH5okiS2Gr2nUlUxzqZjhc4rx4Wt6oaJZe6usRrqFLkqbZoJT1ARd3gk98E47ifpwsE NmfHLVTjCcZpM85X8raYBVRnXFNEywYHJoLvs1KtCrxQQLEkNbnRuPDWbRnBFvgv/8ZaT7vmerx X4kv584KWvjBNuH0nfnpy2LR8f+o6cvfvWfr3458R+jwH5jwGOzuj2g3mKvSfDfASj1LYxBBUDf +8qwCboUnTPjh2LbrbBE8mGtMfUG4kx6eAapz78uvzKpEASJV3XSws6V3idjux6znB0R0R1ySbH qLxNt+IzUg7HQ/l3BLDXN3xszs0UhDD0wqN2Qwcb4YwCno2c X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to specify exact name for the second (AUX) output clock. It has never been used for the lookups based on the system clock name. The driver generates it on its own, in order to remain compatible with the older DT. Drop the clock name. Fixes: 0cc97d9e3fdf ("arm64: dts: qcom: sm8550: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 4234c92aafe3..be4f0609c436 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1939,7 +1939,7 @@ pcie1_phy: phy@1c0e000 { power-domains = <&gcc PCIE_1_PHY_GDSC>; #clock-cells = <1>; - clock-output-names = "pcie1_pipe_clk", "pcie1_phy_aux_clk"; + clock-output-names = "pcie1_pipe_clk"; #phy-cells = <0>;