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a=openpgp-sha256; l=1761; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=4803hWNpcHudkouDSAWKTu5smpjA3R/H+DmuPg5Dn0I=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ1p2SdqUL53vFQ8s+nGjaJruG+mDfzqnZZ8/Xbg/ycrll nDa7ZeqnYzGLAyMXAyyYoosPgUtU2M2JYd92DG1HmYQKxPIFAYuTgGYyKVuDoYF5r4B6/xFP2/Q dtF0MfL9WPRA+f0xnwznNWssGSfLW1dO/7CCQ1JJT/j1k5tVHzPcNrpF1Tt5zlK5nNq4yU/73NN 8LX0J7nn7prk5a3oun+8eFd/2wi1UbpdYdYt8TeT/RS35xbHtfw6fnaAYJP2ktixjW+K/q/aLzq qZlLVk86w4lPzLZpb75vkOavHvU2a0TOESUS39w5CilLv+pWJGmrXhGm+X7iChg47nmxpZL5xa1 JLof033UXSCoMXJvG/WZ+TPv9GY7tIRYvUmcxp/odAT6/6IAzGbJ8/McNoRHewVKVeVtmBhsVBa afIBfZXHKiVPnr6qdw5eFBfKdrrx91s2g5SNHzbxmSUDAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Check that the plane pitch doesn't overflow the maximum pitch size allowed by the hardware. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov Tested-by: Abhinav Kumar # sc7280 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index 4a910b808687..8998d1862e16 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -12,6 +12,8 @@ struct dpu_hw_sspp; +#define DPU_SSPP_MAX_PITCH_SIZE 0xffff + /** * Flags */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 927fde2f1391..b5848fae14ce 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -791,7 +791,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, { struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); - int ret = 0, min_scale; + int i, ret = 0, min_scale; struct dpu_plane *pdpu = to_dpu_plane(plane); struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate; @@ -865,6 +865,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return ret; } + for (i = 0; i < pstate->layout.num_planes; i++) + if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE) + return -E2BIG; + fmt = msm_framebuffer_format(new_plane_state->fb); max_linewidth = pdpu->catalog->caps->max_linewidth;