Message ID | 20240529-qcom-gdscs-v2-7-69c63d0ae1e7@linaro.org |
---|---|
State | Accepted |
Commit | c514f760b504fcb5bb34ea8daeb26f13c3561d95 |
Headers | show
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Series |
[v2,01/14] dt-bindings: clock: qcom,gcc-other: rename to qcom,mdm-mdm9607
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diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index 0fb65f2bbcdf..56415ab34083 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -187,7 +187,6 @@ intc: interrupt-controller@b000000 { gcc: clock-controller@1800000 { compatible = "qcom,gcc-ipq4019"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x1800000 0x60000>; clocks = <&xo>, <&sleep_clk>;
On IPQ4019 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 1 - 1 file changed, 1 deletion(-)