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Fri, 17 May 2024 23:38:11 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 17 May 2024 16:38:11 -0700 From: Abhinav Kumar To: , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Daniel Vetter" CC: , , , , , , Subject: [RFC PATCH 1/4] drm/msm: register a fault handler for display mmu faults Date: Fri, 17 May 2024 16:37:56 -0700 Message-ID: <20240517233801.4071868-2-quic_abhinavk@quicinc.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240517233801.4071868-1-quic_abhinavk@quicinc.com> References: <20240517233801.4071868-1-quic_abhinavk@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YMqC9xMwEsDHwtiNuFoNmJgO9-l6pWjb X-Proofpoint-ORIG-GUID: YMqC9xMwEsDHwtiNuFoNmJgO9-l6pWjb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-17_11,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405170184 In preparation to register a iommu fault handler for display related modules, register a fault handler for the backing mmu object of msm_kms. Currently, the fault handler only captures the display snapshot but we can expand this later if more information needs to be added to debug display mmu faults. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/msm_kms.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers/gpu/drm/msm/msm_kms.c index af6a6fcb1173..62c8e6163e81 100644 --- a/drivers/gpu/drm/msm/msm_kms.c +++ b/drivers/gpu/drm/msm/msm_kms.c @@ -200,6 +200,28 @@ struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev) return aspace; } +static int msm_kms_fault_handler(void *arg, unsigned long iova, int flags, void *data) +{ + struct msm_kms *kms = arg; + struct msm_disp_state *state; + int ret; + + ret = mutex_lock_interruptible(&kms->dump_mutex); + if (ret) + return ret; + + state = msm_disp_snapshot_state_sync(kms); + + mutex_unlock(&kms->dump_mutex); + + if (IS_ERR(state)) { + DRM_DEV_ERROR(kms->dev->dev, "failed to capture snapshot\n"); + return PTR_ERR(state); + } + + return 0; +} + void msm_drm_kms_uninit(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); @@ -261,6 +283,9 @@ int msm_drm_kms_init(struct device *dev, const struct drm_driver *drv) goto err_msm_uninit; } + if (kms->aspace) + msm_mmu_set_fault_handler(kms->aspace->mmu, kms, msm_kms_fault_handler); + drm_helper_move_panel_connectors_to_head(ddev); drm_for_each_crtc(crtc, ddev) {