From patchwork Tue May 7 19:50:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 795266 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DD2D1BF6F9; Tue, 7 May 2024 19:51:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715111521; cv=none; b=rnzNUPq0aFmdU2kqtY4CiSo3EMKHAhmTuXLoexQktz6kSchZ3wkH4MydMmelp83YF4V39fi0U6SXaJsc4gBrdeCv9JhO4xACc+jPOQU2C/3aPROTjNbRD4r43OeJmG3GpRJU1cRL0y1ynz3B9LdzKStApAgc8SnMyYeIPBFCMGE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715111521; c=relaxed/simple; bh=ltXX8jP7pn8uVpu5KSPpn79cIYm5HfBGTiCUp+UHg9k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=j+hcBBHPD0fZxurP2YnaYi5oiyExQs21h3JUKmoo9KhoPgyLqz/FdQjAphPO99zI4UNUNEAfJS95F/7a8CZi8tJAHiqbjO9eZLQjMBNB7wUeFzW9v8hnzw/AygdfvvZ7SWKro3PB//ZzdiokJishYbKCTyKVu/O77b1LNAH5cHM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=hGs2ZB44; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="hGs2ZB44" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 447JpY2e001074; Tue, 7 May 2024 19:51:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=AN6ZcvMWlqNjOXpEc6Fd iWAhkqYqJERCJ3muWeL5xeM=; b=hGs2ZB442V6gb2Ha5owN12aF4CU4DZFglYFL m19eUjTW9fukMhJfpJdjv75h0TitLZu9hWVD2HH+Vv9yfXeGHerJTFeHiZig6pLy 5pNhITXNWma1EvUyGXZs0uT+J2d416yciYWyfFSYNYRsrFWTqVmQ+8Sez6TxDHGc eEPR3Xbyl6n4S7QZkI73MGBJOepmOG57nVQadcRiwFk7sAvf651mJxa+Q4ZRp2UB A9MPpNF+m8w9WohyDOA8w/6P+c815qfIkzv3yV0pvX4H7hDW8Q88pf4AtqwR8R0K dUja0Gto4xLQ9PPEQMZJLw4n+fQ2hW8kbnjJhbGk2y98RaoA1Q== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xyspgg4np-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 May 2024 19:51:34 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 447JpWqt007186 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 7 May 2024 19:51:32 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 7 May 2024 12:51:31 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v21 16/39] usb: host: xhci-plat: Set XHCI max interrupters if property is present Date: Tue, 7 May 2024 12:50:53 -0700 Message-ID: <20240507195116.9464-17-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240507195116.9464-1-quic_wcheng@quicinc.com> References: <20240507195116.9464-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: cTrXuICcTRJtH0-s2paja7c2I8JlY1-s X-Proofpoint-ORIG-GUID: cTrXuICcTRJtH0-s2paja7c2I8JlY1-s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-07_12,2024-05-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 mlxlogscore=999 adultscore=0 spamscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405070138 Some platforms may want to limit the number of XHCI interrupters allocated. This is passed to xhci-plat as a device property. Ensure that this is read and the max_interrupters field is set. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-plat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 3d071b875308..1c12cadc02a1 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -258,6 +258,8 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + device_property_read_u16(tmpdev, "num-hc-interrupters", + &xhci->max_interrupters); } /*