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[86.12.82.21]) by smtp.gmail.com with ESMTPSA id z18-20020adff1d2000000b0034df178a9acsm3782482wro.99.2024.05.03.06.43.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 May 2024 06:43:18 -0700 (PDT) From: Connor Abbott Date: Fri, 03 May 2024 14:42:33 +0100 Subject: [PATCH 4/5] drm/msm: Adjust a7xx GBIF debugbus dumping Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240503-a750-devcoredump-v1-4-04e669e2c3f7@gmail.com> References: <20240503-a750-devcoredump-v1-0-04e669e2c3f7@gmail.com> In-Reply-To: <20240503-a750-devcoredump-v1-0-04e669e2c3f7@gmail.com> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Connor Abbott X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1714743792; l=1650; i=cwabbott0@gmail.com; s=20240426; h=from:subject:message-id; bh=N2zmFSrGkT9c6ndL5IyvUHusS/s0yaPn2YlVkfAC70k=; b=qzN/0XhCAE9mT9rvz/hZiZh4o/gIsgeE9ZFcVkQqAiTF6dBe2y4ARJG9oS9a9lqFW9PEZEFaP JOxEQgTtpxdArWtzQxiBst7/VnYQtBbqVtgAFS0qzxfFkSqbLrmb88e X-Developer-Key: i=cwabbott0@gmail.com; a=ed25519; pk=dkpOeRSXLzVgqhy0Idr3nsBr4ranyERLMnoAgR4cHmY= Use the kgsl-style list of indices, because this is about to change for a750 and we want to reuse the downstream header directly. --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c index 83d7ee01c944..bb0592af41f3 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c @@ -412,7 +412,7 @@ static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu, for (i = 0; i < ARRAY_SIZE(a7xx_gbif_debugbus_blocks); i++) { a6xx_get_debugbus_block(gpu, - a6xx_state, &a7xx_gbif_debugbus_blocks[i], + a6xx_state, &a7xx_debugbus_blocks[a7xx_gbif_debugbus_blocks[i]], &a6xx_state->debugbus[i + debugbus_blocks_count]); } } diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h index 5ddd32063bcc..3b1ba514e8ee 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h @@ -517,9 +517,9 @@ static const struct a6xx_debugbus_block a650_debugbus_blocks[] = { DEBUGBUS(A6XX_DBGBUS_SPTP_5, 0x100), }; -static const struct a6xx_debugbus_block a7xx_gbif_debugbus_blocks[] = { - DEBUGBUS(A7XX_DBGBUS_GBIF_CX, 0x100), - DEBUGBUS(A7XX_DBGBUS_GBIF_GX, 0x100), +static const u32 a7xx_gbif_debugbus_blocks[] = { + A7XX_DBGBUS_GBIF_CX, + A7XX_DBGBUS_GBIF_GX, }; static const struct a6xx_debugbus_block a7xx_cx_debugbus_blocks[] = {