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Thu, 25 Apr 2024 06:44:44 -0700 (PDT)
From: Connor Abbott <cwabbott0@gmail.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org
Cc: Connor Abbott <cwabbott0@gmail.com>
Subject: [PATCH 1/6] arm64: dts: qcom: sm8650: Fix GPU cx_mem size
Date: Thu, 25 Apr 2024 14:43:49 +0100
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| Series |
drm/msm: Support a750 "software fuse" for raytracing
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expand
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diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 658ad2b41c5a..78b8944eaab2 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2607,7 +2607,7 @@ tcsr: clock-controller@1fc0000 { gpu: gpu@3d00000 { compatible = "qcom,adreno-43051401", "qcom,adreno"; reg = <0x0 0x03d00000 0x0 0x40000>, - <0x0 0x03d9e000 0x0 0x1000>, + <0x0 0x03d9e000 0x0 0x2000>, <0x0 0x03d61000 0x0 0x800>; reg-names = "kgsl_3d0_reg_memory", "cx_mem",
This is doubled compared to previous GPUs. We can't access the new SW_FUSE_VALUE register without this. Fixes: db33633b05c0 ("arm64: dts: qcom: sm8650: add GPU nodes") Signed-off-by: Connor Abbott <cwabbott0@gmail.com> --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)