From patchwork Wed Apr 17 10:56:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 790800 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B04B13E411; Wed, 17 Apr 2024 10:57:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713351437; cv=none; b=AgP2TDWJoGnbNazBQXYRnF1hh2b98WpBRfI5dzRce3brhdNNeedDu4Zywn03i7WkPGxBzMboY+/kgbH4ETnjaQUSWFDgJ5urubdzMKh1AQLHG+rS1TqYKKhyJiJ6K658AUQpZzqW3z1Ka96USyuhQvf4yd9iTdlliGXzYWAODSg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713351437; c=relaxed/simple; bh=T6AypkH3WpV7sX0/al8Y8+9eYsNDm9sgfT2ZqgdoI8k=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qPia/YTNpe34twczua7KNps0faf+ghBQhLDpS1kMxArO7Eh0aUrZHQLGiwGcSQi18GXdzDAJqgA0K5vsRItDB58cwxI8/2EiHBTzkH5QPRNU5YOYBxsCyitG+2t++EYAaHnmW6OX/3T2TYQzZx+P3UIwpY6eVCpHN/2ey3d2JeA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=ktl8gwjq; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ktl8gwjq" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 43H7H6eZ028034; Wed, 17 Apr 2024 10:57:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=XQz0y87xjJzpSve+PFnGb8Dxx4cy4BCAlvoWDerKyCU=; b=kt l8gwjqEB6onvfOJ4z4OB2gK6HlZZpAQZ+TQab3HoxC4przpn2H0Dq7AXGl0WvcpN lmn5eqOrRctlOtDyafLdbzqZqEcx1OzYSxK3faOYs4VmKY4NATu6Te/OuOXENhFR Zeg+yk32VNcLMEsxA7PCG7MmOD0zBQR9n0qalEEsMVK7Tm1vPAURLQ+2pRYtB4sT GdLnG3dVGQUNdulhfW2dogZSr0TbJxZVJz0Y/GyJQ9yP3Qlx0rhXecZcX+hou/Wp UiOQEjnjEZmqSg61mGrY1vfK8bklwOyLdZkHDytdGBwSf4m9eE0BIgUvURdfhKad WHSoLmKeXcxkCXlIW0yA== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xj9w58frd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Apr 2024 10:57:13 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43HAvBx6016127 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Apr 2024 10:57:11 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 17 Apr 2024 03:57:06 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , Subject: [PATCH v8 7/7] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc Date: Wed, 17 Apr 2024 16:26:05 +0530 Message-ID: <20240417105605.836705-8-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240417105605.836705-1-quic_varada@quicinc.com> References: <20240417105605.836705-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 5vGR8Y80gedHvEohnBgKaLDyvzRleKWL X-Proofpoint-GUID: 5vGR8Y80gedHvEohnBgKaLDyvzRleKWL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-17_08,2024-04-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 phishscore=0 clxscore=1015 malwarescore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404170075 IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7f2e5cbf3bbb..5b3e69379b1f 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -306,6 +307,7 @@ gcc: clock-controller@1800000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + #interconnect-cells = <1>; }; tcsr_mutex: hwlock@1905000 {