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[78.88.45.141]) by smtp.gmail.com with ESMTPSA id l1-20020a17090615c100b00a524e3f2f9esm6128057ejd.98.2024.04.17.13.07.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:07:06 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 Apr 2024 22:07:00 +0200 Subject: [PATCH 2/2] iommu/qcom: Always consume all clocks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240416-topic-qcom_iommu-v1-2-fabe55b3b7b3@linaro.org> References: <20240416-topic-qcom_iommu-v1-0-fabe55b3b7b3@linaro.org> In-Reply-To: <20240416-topic-qcom_iommu-v1-0-fabe55b3b7b3@linaro.org> To: Rob Clark , Will Deacon , Robin Murphy , Joerg Roedel Cc: iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Stephan Gerhold , Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713384421; l=3042; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=3mbMg2ivwWNTK3xsS4wYTiDYZ0KlaU3IbtBCWSlfYEw=; b=vMKT1TBfwDN6a7yS7Xa9gR7+R8/09NZEgAT7cVeFCam7yhXFkvI+O3+YWOJ91TNYJjTsArd92 T3eW7mR8qIWCZp6oPYrDTvlNFLA5FPFMjMh/2H2oX1NZ647vny1akj5 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Some platforms provide more clocks than others, we already have the DT schema to ensure sanity here plus these clocks simply need to be on. Use devm_clk_bulk_get_all and get rid of some boilerplate. Signed-off-by: Konrad Dybcio --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 38 +++++++-------------------------- 1 file changed, 8 insertions(+), 30 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index 3dca9293c509..ace69030a422 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -34,13 +34,6 @@ #define SMMU_INTR_SEL_NS 0x2000 -enum qcom_iommu_clk { - CLK_IFACE, - CLK_BUS, - CLK_TBU, - CLK_NUM, -}; - struct qcom_iommu_ctx { struct device *dev; void __iomem *base; @@ -54,7 +47,8 @@ struct qcom_iommu_dev { /* IOMMU core code handle */ struct iommu_device iommu; struct device *dev; - struct clk_bulk_data clks[CLK_NUM]; + struct clk_bulk_data *clks; + int num_clks; void __iomem *local_base; u32 sec_id; u8 max_asid; @@ -781,7 +775,6 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) struct qcom_iommu_dev *qcom_iommu; struct device *dev = &pdev->dev; struct resource *res; - struct clk *clk; int ret, max_asid = 0; /* find the max asid (which is 1:1 to ctx bank idx), so we know how @@ -804,26 +797,11 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) return PTR_ERR(qcom_iommu->local_base); } - clk = devm_clk_get(dev, "iface"); - if (IS_ERR(clk)) { - dev_err(dev, "failed to get iface clock\n"); - return PTR_ERR(clk); - } - qcom_iommu->clks[CLK_IFACE].clk = clk; - - clk = devm_clk_get(dev, "bus"); - if (IS_ERR(clk)) { - dev_err(dev, "failed to get bus clock\n"); - return PTR_ERR(clk); - } - qcom_iommu->clks[CLK_BUS].clk = clk; + ret = devm_clk_bulk_get_all(dev, &qcom_iommu->clks); + if (ret <= 0) + return dev_err_probe(dev, ret, "Couldn't get clocks\n"); - clk = devm_clk_get_optional(dev, "tbu"); - if (IS_ERR(clk)) { - dev_err(dev, "failed to get tbu clock\n"); - return PTR_ERR(clk); - } - qcom_iommu->clks[CLK_TBU].clk = clk; + qcom_iommu->num_clks = ret; if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id", &qcom_iommu->sec_id)) { @@ -891,7 +869,7 @@ static int __maybe_unused qcom_iommu_resume(struct device *dev) struct qcom_iommu_dev *qcom_iommu = dev_get_drvdata(dev); int ret; - ret = clk_bulk_prepare_enable(CLK_NUM, qcom_iommu->clks); + ret = clk_bulk_prepare_enable(qcom_iommu->num_clks, qcom_iommu->clks); if (ret < 0) return ret; @@ -905,7 +883,7 @@ static int __maybe_unused qcom_iommu_suspend(struct device *dev) { struct qcom_iommu_dev *qcom_iommu = dev_get_drvdata(dev); - clk_bulk_disable_unprepare(CLK_NUM, qcom_iommu->clks); + clk_bulk_disable_unprepare(qcom_iommu->num_clks, qcom_iommu->clks); return 0; }