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Mon, 08 Apr 2024 04:47:12 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id g17-20020a19e051000000b005158ddab172sm1175549lfj.19.2024.04.08.04.47.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 04:47:11 -0700 (PDT) From: Dmitry Baryshkov Date: Mon, 08 Apr 2024 14:47:05 +0300 Subject: [PATCH 2/4] clk: qcom: dispcc-sm6350: fix DisplayPort clocks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240408-dispcc-dp-clocks-v1-2-f9e44902c28d@linaro.org> References: <20240408-dispcc-dp-clocks-v1-0-f9e44902c28d@linaro.org> In-Reply-To: <20240408-dispcc-dp-clocks-v1-0-f9e44902c28d@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , Konrad Dybcio , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1555; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=OsDfVmwigHiKLQONHsnbey3y8n9mOJj5tZKTmOviAn4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmE9k9H5X8yWLigKleQcptLAkRmAVjhc0DUmetS t6V2YwGWdWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZhPZPQAKCRCLPIo+Aiko 1VinCACL15UdGiAHHUzISh3SClQ/NVhj0nL6bIOISNQbcB/Y3jfnqOkEIdiL6uXtknAihDBevZq /N2gZ2INDcXqZDpYaMTwz7PB+w8qulCbwGuKHG9rrXlJSaqtvKBNv/wi2OYkRRA+KyXhGGewOA7 uWxcy/gtGLWqpucxCGaJJu3cEOCe0XiPMDXhOaJd6OXZW00rSu/rX1ioc6NPSAdz2ow+Wz83tQ5 txyqMynPFC1xcUv/1no3jrkkkHurBxz3SN8a3ZMfjBznYpMG317IlPTkSW9bsG7XqRj5aRZP3re 8oxcL6744FUt2kPjn1RFC0LTu7n/HlR/w6aIavhSjS+q2mrg X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On SM6350 DisplayPort link clocks use frequency tables inherited from the vendor kernel, it is not applicable in the upstream kernel. Drop frequency tables and use clk_byte2_ops for those clocks. Fixes: 837519775f1d ("clk: qcom: Add display clock controller driver for SM6350") Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Tested-by: Luca Weiss --- drivers/clk/qcom/dispcc-sm6350.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/clk/qcom/dispcc-sm6350.c b/drivers/clk/qcom/dispcc-sm6350.c index 839435362010..e4b7464c4d0e 100644 --- a/drivers/clk/qcom/dispcc-sm6350.c +++ b/drivers/clk/qcom/dispcc-sm6350.c @@ -221,26 +221,17 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { }, }; -static const struct freq_tbl ftbl_disp_cc_mdss_dp_link_clk_src[] = { - F(162000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(270000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(540000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(810000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - { } -}; - static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .cmd_rcgr = 0x10f8, .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_0, - .freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_data = disp_cc_parent_data_0, .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, };