From patchwork Mon Mar 25 10:20:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 782781 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AC801B04B0; Mon, 25 Mar 2024 10:21:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711362084; cv=none; b=X+4fuA7VC9Tn4qh4xX0N8iks+P3wClbi1SUmd6sdaG6WvZOttxKvcYW40d9z/TmfdzqNGYUJ0gb8xM+AysSkHeOcl9tTN9VEIlAVBDGpDFr1pmb65CI86xvLwRCE5ecmd4EchCvYh0auYT2+kWSwfbjJ5kz6qbwxd7xSx0rTPZ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711362084; c=relaxed/simple; bh=lnS95bunV/EH9UhcF3G/sCrMeEzpcJBQkovuEjBYQDA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rNSMrCHCjbXrhRwxU2IH6tJioWEQuz/UrdKplvE7ZYyMvu6Mnf6io+DUSbCqM7aEjdAUF3SsgzA+Z0d3/1/H6Yi9ZJLqR9WP/j4BxbUVOFSwfweIB6yZCxwyNJZFVvwyfknsnK288JvTzf/CbrK0mSuOhYfey9C05Y6E0wDsWmM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=pOtOowlq; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="pOtOowlq" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42P9Rtk2031881; Mon, 25 Mar 2024 10:21:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=9CHl93Q8DRAjWAYjiISTKY13GhosV9C3yA+9XS3PrZ8=; b=pO tOowlq3P/d2CiqOoFYxSRu/6D4PWZ5ki3gnqhYmfUg0OwmkBfs/pqIjlu4ar3vbI 7uw6V6jFlnbFHWqgL55KFF9ZS1ObKZ0wcBwdvFLWUWy60w06bN+xHKm8TusZeaJv wI9HD2ckZZJ4vqb5nndkwzd+/OjXbpp163dqh7Qu2z0AozkAid95ulFXsddVL0bL SnllaNqDSQxNjrcp/x58jDOeqAfN84BWjrwLAktTrkSupQS/pSUhPMzuz+0CrYPN TPqk2HtJnJ5Egn+Ft8Rw1Jj5bGfDUBQIRq3c9eDvy/qS7IUEslOvIGAy/J+MP3uP PDkky/ZFb5ddKHIHu+yw== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x319j8re3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Mar 2024 10:21:17 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42PALGW7016199 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Mar 2024 10:21:16 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 25 Mar 2024 03:21:11 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 4/4] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc Date: Mon, 25 Mar 2024 15:50:36 +0530 Message-ID: <20240325102036.95484-5-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240325102036.95484-1-quic_varada@quicinc.com> References: <20240325102036.95484-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: sqxEGgZ6sgjvxuXxq4wskYn9EM-KoJ3E X-Proofpoint-GUID: sqxEGgZ6sgjvxuXxq4wskYn9EM-KoJ3E X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-25_07,2024-03-21_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 mlxscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 adultscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403210001 definitions=main-2403250056 IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Signed-off-by: Varadarajan Narayanan --- v2: Fix include file order Move to separate patch --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7f2e5cbf3bbb..5b3e69379b1f 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -306,6 +307,7 @@ gcc: clock-controller@1800000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + #interconnect-cells = <1>; }; tcsr_mutex: hwlock@1905000 {