| Message ID | 20240325102036.95484-2-quic_varada@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/4] dt-bindings: clock: Add interconnect-cells | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml index 944a0ea79cd6..824781cbdf34 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml @@ -33,6 +33,9 @@ properties: - description: PCIE30 PHY3 pipe clock source - description: USB3 PHY pipe clock source + '#interconnect-cells': + const: 1 + required: - compatible - clocks
Add interconnect-cells to clock provider so that it can be used as icc provider Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml | 3 +++ 1 file changed, 3 insertions(+)