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Fri, 22 Mar 2024 04:58:18 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id d7-20020a2e8907000000b002d10daeb6dasm307430lji.126.2024.03.22.04.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Mar 2024 04:58:17 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 22 Mar 2024 13:58:16 +0200 Subject: [PATCH 1/2] arm64: dts: qcom: sm8250: describe HS signals properly Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240322-typec-fix-sm8250-v1-1-1ac22b333ea9@linaro.org> References: <20240322-typec-fix-sm8250-v1-0-1ac22b333ea9@linaro.org> In-Reply-To: <20240322-typec-fix-sm8250-v1-0-1ac22b333ea9@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2665; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=98BCJ0NbsVizpp9ZzVzT5Y699xuRAXE4zH1lvoYksiQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl/XJYDQuh4AMoszLe6Ko2XoV3XCUdNdq3KUnBz eq8by4gPE6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZf1yWAAKCRCLPIo+Aiko 1WypB/4gZqLlhCDi6OQO8X76Ew0qC8bPbwLRiZmRdV1gxJhodt+I5yQgsdi3R82CW5BhrV6TcjI 4Ww6E1lC0dpafpUbkh7SOngl2F5dE23ErkFgq9f615zBwK495/XZGRkH4F0tdzDgulquG2hVlQm 5N3kwdhqhm5vmK/svzdoXwzod8VIMELwvGfkLZXpXAWOAc43U0mpIeJV9WzywhnUQnRpWrFS5/h oeReZoUDLwk/dmzol2Vt5BmEGSeunVFR4U4RfXoWMp87mt54dvO/wd7OCx0Kg3AMd3jP2UqYvcQ Vg2aryVZBiZUB73wioZ4TP1mmnajGLT2VCC3boDA8dEUwd+8 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The OF graph should describe physical signals. There is no 'role switch' signal between Type-C connector and the DWC3 USB controller. Instead there is a HighSpeed signal lane between DWC3 controller and the USB-C connector. Rename endpoints in accordance to that (this follows the example lead by other plaforms, including QRB2210 RB1, QRB4210 RB2 and all PMIC GLINK platforms). Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 8 ++++---- arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index cd0db4f31d4a..44239d1e57e9 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -1356,8 +1356,8 @@ &usb_1_dwc3 { usb-role-switch; }; -&usb_1_role_switch_out { - remote-endpoint = <&pm8150b_role_switch_in>; +&usb_1_dwc3_hs_out { + remote-endpoint = <&pm8150b_hs_in>; }; &usb_1_hsphy { @@ -1465,8 +1465,8 @@ ports { port@0 { reg = <0>; - pm8150b_role_switch_in: endpoint { - remote-endpoint = <&usb_1_role_switch_out>; + pm8150b_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs_out>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi index 6f54f50a70b0..99915a2b97e2 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi @@ -652,8 +652,8 @@ ports { port@0 { reg = <0>; - pm8150b_role_switch_in: endpoint { - remote-endpoint = <&usb_1_role_switch_out>; + pm8150b_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs_out>; }; }; }; @@ -716,8 +716,8 @@ &usb_1_hsphy { status = "okay"; }; -&usb_1_role_switch_out { - remote-endpoint = <&pm8150b_role_switch_in>; +&usb_1_dwc3_hs_out { + remote-endpoint = <&pm8150b_hs_in>; }; &ufs_mem_hc { diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 39bd8f0eba1e..d57039a4c3aa 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4196,7 +4196,7 @@ usb_1_dwc3: usb@a600000 { phy-names = "usb2-phy", "usb3-phy"; port { - usb_1_role_switch_out: endpoint {}; + usb_1_dwc3_hs_out: endpoint {}; }; }; };