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a=openpgp-sha256; l=204789; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=YcY/gdzxTAonireVkCGIL6FzwNac4qk7F5asiYfq0yA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl9DURybdavKdf3E/kA2/wNSYH6GEtmtzMMV8gt hbirs+h9rOJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfQ1EQAKCRCLPIo+Aiko 1T1mB/sGggdTup49l7d5VC2E/Kg8JWWSLEZMdt8jTptQAr7tzCmMU5W2a2vKQ+/zHCtW489d8Dn 4IhFgb191Kk6dg0Aoh1ybMHKayVSDbYEH53Lcv5F5L3PzUdcNM6Fy0e/yt/X0iSvYQhTrCJfcHM 72wtPvf/67pitC+LPAlwCarOJhPoMCdwJ5J5+NUTNpPlBD/oHjuRc2T1yv5EWRCuTmY0lIPxYne 5j22BIg5cvh2Vne8oSZQ7hzQMiW4zTgKPUUAYD4hZa/EywoNpbn0tbW7X9grbyO5Mb4Xq+zF9W3 EOEfo3djyBGPTybwOep8oeChfpir5WdcbH02BoZHu3S273il X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Import display-related registers database from the Mesa, commit cb1b6649e12a ("freedreno/regs: define the wide bus enable bit in DSI_VID_CFG0"). The msm.xml and mdp*.xml files were adjusted to drop subdirectory paths. The mdp4_csc group has been inlined in mdp4.xml THe doffsets attribute of WB array was fixed in mdp5.xml. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/.gitignore | 4 + drivers/gpu/drm/msm/registers/display/dsi.xml | 390 ++++++++ .../gpu/drm/msm/registers/display/dsi_phy_10nm.xml | 102 ++ .../gpu/drm/msm/registers/display/dsi_phy_14nm.xml | 135 +++ .../gpu/drm/msm/registers/display/dsi_phy_20nm.xml | 100 ++ .../gpu/drm/msm/registers/display/dsi_phy_28nm.xml | 180 ++++ .../msm/registers/display/dsi_phy_28nm_8960.xml | 134 +++ .../gpu/drm/msm/registers/display/dsi_phy_7nm.xml | 230 +++++ drivers/gpu/drm/msm/registers/display/edp.xml | 239 +++++ drivers/gpu/drm/msm/registers/display/hdmi.xml | 1015 ++++++++++++++++++++ drivers/gpu/drm/msm/registers/display/mdp4.xml | 504 ++++++++++ drivers/gpu/drm/msm/registers/display/mdp5.xml | 806 ++++++++++++++++ .../gpu/drm/msm/registers/display/mdp_common.xml | 89 ++ drivers/gpu/drm/msm/registers/display/msm.xml | 32 + drivers/gpu/drm/msm/registers/display/sfpb.xml | 17 + .../gpu/drm/msm/registers/freedreno_copyright.xml | 40 + drivers/gpu/drm/msm/registers/rules-ng.xsd | 457 +++++++++ 17 files changed, 4474 insertions(+) diff --git a/drivers/gpu/drm/msm/.gitignore b/drivers/gpu/drm/msm/.gitignore new file mode 100644 index 000000000000..167abc8909a2 --- /dev/null +++ b/drivers/gpu/drm/msm/.gitignore @@ -0,0 +1,4 @@ +# ignore XML files present at Mesa but not used by the kernel +registers/adreno/adreno_control_regs.xml +registers/adreno/adreno_pipe_regs.xml +registers/adreno/ocmem.xml diff --git a/drivers/gpu/drm/msm/registers/display/dsi.xml b/drivers/gpu/drm/msm/registers/display/dsi.xml new file mode 100644 index 000000000000..9fdca3b75678 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi.xml @@ -0,0 +1,390 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_10nm.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_10nm.xml new file mode 100644 index 000000000000..8e13848ea590 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_10nm.xml @@ -0,0 +1,102 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_14nm.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_14nm.xml new file mode 100644 index 000000000000..4e43af7ccb7b --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_14nm.xml @@ -0,0 +1,135 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_20nm.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_20nm.xml new file mode 100644 index 000000000000..d7ab9628eace --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_20nm.xml @@ -0,0 +1,100 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm.xml new file mode 100644 index 000000000000..f1202aaa2370 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm.xml @@ -0,0 +1,180 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm_8960.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm_8960.xml new file mode 100644 index 000000000000..ca8db83deda5 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_28nm_8960.xml @@ -0,0 +1,134 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml b/drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml new file mode 100644 index 000000000000..0d0db283be14 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml @@ -0,0 +1,230 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/edp.xml b/drivers/gpu/drm/msm/registers/display/edp.xml new file mode 100644 index 000000000000..00fc6112585e --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/edp.xml @@ -0,0 +1,239 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/hdmi.xml b/drivers/gpu/drm/msm/registers/display/hdmi.xml new file mode 100644 index 000000000000..e553f4299be4 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/hdmi.xml @@ -0,0 +1,1015 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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index 000000000000..ae008937c645 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/mdp5.xml @@ -0,0 +1,806 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 8bit characters per pixel minus 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bits per component (non-alpha channel) + + + + + + + + bits per component (alpha channel) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/msm.xml b/drivers/gpu/drm/msm/registers/display/msm.xml new file mode 100644 index 000000000000..429c35b73bad --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/msm.xml @@ -0,0 +1,32 @@ + + + + + + Register definitions for the display related hw blocks on + msm/snapdragon + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/display/sfpb.xml b/drivers/gpu/drm/msm/registers/display/sfpb.xml new file mode 100644 index 000000000000..a08c82ff1699 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/display/sfpb.xml @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/freedreno_copyright.xml b/drivers/gpu/drm/msm/registers/freedreno_copyright.xml new file mode 100644 index 000000000000..bb0a84a2e82c --- /dev/null +++ b/drivers/gpu/drm/msm/registers/freedreno_copyright.xml @@ -0,0 +1,40 @@ + + + + + + +Initial Author. + + + +many a3xx/a4xx contributions + + + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + + + + diff --git a/drivers/gpu/drm/msm/registers/rules-ng.xsd b/drivers/gpu/drm/msm/registers/rules-ng.xsd new file mode 100644 index 000000000000..414dee1d7468 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/rules-ng.xsd @@ -0,0 +1,457 @@ + + + + + + An updated version of the old rules.xml file from the + RivaTV project. Specifications by Pekka Paalanen, + preliminary attempt by KoalaBR, + first working version by Jakob Bornecrantz. + For specifications, see the file rules-ng-format.txt + in Nouveau CVS module 'rules-ng'. + + Version 0.1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + register database author + + + + + + + + + + + + nickType + + + + + + + + + databaseType + + + + + + + + + + importType + + + + + + + copyrightType + + + + + + + + + + + + + domainType + + + + + + + + + + + + + + + + + + groupType + + + + + + + + + + + + arrayType + + + + + + + + + + + + + + + + + + + + + stripeType + + + + + + + + + + + + + + + + + + + registerType used by reg8, reg16, reg32, reg64 + + + + + + + + + + + + + + + + + + + + + + + + + + + + bitsetType + + + + + + + + + + + + + + + + bitfieldType + + + + + + + + + + + + + + + + + + + + + + enumType + + + + + + + + + + + + + + + + valueType + + + + + + + + + + + + + + refType + + + + + + + + + + + brief documentation, no markup + + + + + + + + + + + root element of documentation sub-tree + + + + + + + + + + + + + for bold, underline, italics + + + + + + + + + + + + + + + + + + + definition of a list, ordered or unordered + + + + + + + + + + + items of a list + + + + + + + + + + + + + + + + + + + + + + + + HexOrNumber + + + + + + + + + + + + + + + + + + Access + + + + + + + + + + + DomainWidth + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +