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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id dw20-20020a0565122c9400b005132bf9f8dcsm2957606lfb.303.2024.03.07.12.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Mar 2024 12:26:39 -0800 (PST) From: Konrad Dybcio Date: Thu, 07 Mar 2024 21:25:57 +0100 Subject: [PATCH 4/4] arm64: dts: qcom: sc8280xp: Describe TCSR download mode register Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240307-topic-8280_nodes-v1-4-4eba20e08902@linaro.org> References: <20240307-topic-8280_nodes-v1-0-4eba20e08902@linaro.org> In-Reply-To: <20240307-topic-8280_nodes-v1-0-4eba20e08902@linaro.org> To: Bjorn Andersson , Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Konrad Dybcio X-Mailer: b4 0.13-dev-0438c To allow for swift EDL reboots, describe the respective register under the scm node. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 44c8d543eb67..505cae44f828 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -300,6 +300,7 @@ firmware { scm: scm { compatible = "qcom,scm-sc8280xp", "qcom,scm"; interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; + qcom,dload-mode = <&tcsr 0x13000>; }; };