| Message ID | 20240229-topic-sm8x50-upstream-phy-combo-typec-mux-v1-3-07e24a231840@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode | expand |
On 29-02-24, 14:07, Neil Armstrong wrote: > Introduce an enum for the QMP Combo PHY modes, use it in the > QMP commmon phy init function and default to COMBO mode. > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 41 +++++++++++++++++++++++++++---- > 1 file changed, 36 insertions(+), 5 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > index 3721bbea9eae..ac5d528fd7a1 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > @@ -61,6 +61,12 @@ > > #define PHY_INIT_COMPLETE_TIMEOUT 10000 > > +enum qphy_mode { > + QPHY_MODE_COMBO = 0, > + QPHY_MODE_DP_ONLY, > + QPHY_MODE_USB_ONLY, > +}; > + > /* set of registers with offsets different per-PHY */ > enum qphy_reg_layout { > /* PCS registers */ > @@ -1491,6 +1497,7 @@ struct qmp_combo { > > struct mutex phy_mutex; > int init_count; > + enum qphy_mode init_mode; > > struct phy *usb_phy; > enum phy_mode mode; > @@ -2531,12 +2538,33 @@ static int qmp_combo_com_init(struct qmp_combo *qmp, bool force) > if (qmp->orientation == TYPEC_ORIENTATION_REVERSE) > val |= SW_PORTSELECT_VAL; > writel(val, com + QPHY_V3_DP_COM_TYPEC_CTRL); > - writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); > > - /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ > - qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, > - SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | > - SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); > + switch (qmp->init_mode) { > + case QPHY_MODE_COMBO: Case should be at same indent as switch :-) coding style 101 > + writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); > + > + /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ > + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, > + SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | > + SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); > + break; > + > + case QPHY_MODE_DP_ONLY: > + writel(DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); > + > + /* bring QMP DP PHY PCS block out of reset */ > + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, > + SW_DPPHY_RESET_MUX | SW_DPPHY_RESET); > + break; > + > + case QPHY_MODE_USB_ONLY: > + writel(USB3_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); > + > + /* bring QMP USB PHY PCS block out of reset */ > + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, > + SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); > + break; > + } > > qphy_clrbits(com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); > qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); > @@ -3545,6 +3573,9 @@ static int qmp_combo_probe(struct platform_device *pdev) > if (ret) > goto err_node_put; > > + /* Set PHY_MODE as combo by default */ > + qmp->init_mode = QPHY_MODE_COMBO; > + > qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); > if (IS_ERR(qmp->usb_phy)) { > ret = PTR_ERR(qmp->usb_phy); > > -- > 2.34.1
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 3721bbea9eae..ac5d528fd7a1 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -61,6 +61,12 @@ #define PHY_INIT_COMPLETE_TIMEOUT 10000 +enum qphy_mode { + QPHY_MODE_COMBO = 0, + QPHY_MODE_DP_ONLY, + QPHY_MODE_USB_ONLY, +}; + /* set of registers with offsets different per-PHY */ enum qphy_reg_layout { /* PCS registers */ @@ -1491,6 +1497,7 @@ struct qmp_combo { struct mutex phy_mutex; int init_count; + enum qphy_mode init_mode; struct phy *usb_phy; enum phy_mode mode; @@ -2531,12 +2538,33 @@ static int qmp_combo_com_init(struct qmp_combo *qmp, bool force) if (qmp->orientation == TYPEC_ORIENTATION_REVERSE) val |= SW_PORTSELECT_VAL; writel(val, com + QPHY_V3_DP_COM_TYPEC_CTRL); - writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); - /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ - qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, - SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | - SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); + switch (qmp->init_mode) { + case QPHY_MODE_COMBO: + writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); + + /* bring both QMP USB and QMP DP PHYs PCS block out of reset */ + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + SW_DPPHY_RESET_MUX | SW_DPPHY_RESET | + SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); + break; + + case QPHY_MODE_DP_ONLY: + writel(DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); + + /* bring QMP DP PHY PCS block out of reset */ + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + SW_DPPHY_RESET_MUX | SW_DPPHY_RESET); + break; + + case QPHY_MODE_USB_ONLY: + writel(USB3_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); + + /* bring QMP USB PHY PCS block out of reset */ + qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL, + SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); + break; + } qphy_clrbits(com, QPHY_V3_DP_COM_SWI_CTRL, 0x03); qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); @@ -3545,6 +3573,9 @@ static int qmp_combo_probe(struct platform_device *pdev) if (ret) goto err_node_put; + /* Set PHY_MODE as combo by default */ + qmp->init_mode = QPHY_MODE_COMBO; + qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); if (IS_ERR(qmp->usb_phy)) { ret = PTR_ERR(qmp->usb_phy);
Introduce an enum for the QMP Combo PHY modes, use it in the QMP commmon phy init function and default to COMBO mode. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 41 +++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 5 deletions(-)