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[109.60.83.139]) by smtp.googlemail.com with ESMTPSA id ts7-20020a170907c5c700b00a43f4722eaesm926910ejc.103.2024.02.28.09.24.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 09:24:59 -0800 (PST) From: Robert Marko To: andersson@kernel.org, konrad.dybcio@linaro.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH net-next v2 2/2] net: phy: qcom: qca808x: fill in possible_interfaces Date: Wed, 28 Feb 2024 18:24:10 +0100 Message-ID: <20240228172452.2456842-3-robimarko@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240228172452.2456842-1-robimarko@gmail.com> References: <20240228172452.2456842-1-robimarko@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently QCA808x driver does not fill the possible_interfaces. 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports SGMII, so fill the possible_interfaces accordingly. Signed-off-by: Robert Marko --- drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c index a4c61a8e07c3..5048304ccc9e 100644 --- a/drivers/net/phy/qcom/qca808x.c +++ b/drivers/net/phy/qcom/qca808x.c @@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct phy_device *phydev) return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); } +static void qca808x_fill_possible_interfaces(struct phy_device *phydev) +{ + unsigned long *possible = phydev->possible_interfaces; + + __set_bit(PHY_INTERFACE_MODE_SGMII, possible); + + if (!qca808x_is_1g_only(phydev)) + __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); +} + static int qca808x_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; @@ -231,6 +241,8 @@ static int qca808x_config_init(struct phy_device *phydev) } } + qca808x_fill_possible_interfaces(phydev); + /* Configure adc threshold as 100mv for the link 10M */ return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD, QCA808X_ADC_THRESHOLD_MASK,