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Tue, 20 Feb 2024 19:43:00 -0800 (PST) Received: from [127.0.1.1] ([117.207.28.224]) by smtp.gmail.com with ESMTPSA id o23-20020a056a001b5700b006e466369645sm4436231pfv.132.2024.02.20.19.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 19:43:00 -0800 (PST) From: Manivannan Sadhasivam Date: Wed, 21 Feb 2024 09:12:01 +0530 Subject: [PATCH 15/21] arm64: dts: qcom: ipq8074: Add PCIe bridge node Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240221-pcie-qcom-bridge-dts-v1-15-6c6df0f9450d@linaro.org> References: <20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org> In-Reply-To: <20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1264; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=ypuCPT3MTqkhsDjqnsU05TKdPs3cZKAeidyYAq0PCTw=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl1XEISjrqKUr/A17dlCnr0wtHL3kzwFLHJxs0I h7yKs/btCSJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZdVxCAAKCRBVnxHm/pHO 9TJzB/9LSmJekSDCNJA2lNACK3m1WIBhM8ZRL0dDXTEQjypvYOU0QKt79bXyOz19qUaBQBnWLvx iKIRV7DQRb+NLJvCV3+zzGhNEooWtez/aOMjglodpxxkbVIlBkZPnVqls9i7YJYCH+WVMwKG9GK ymZhP34eiSgr5q1ALrA6ct3NDVa/ypfK5Xv2vSAZ+TwPyupzBB6aUSMZ2xQzt1hd771mKEASese WzDNHsTscZL53gc22rlc7wey7FWBpevZ6BiZ7NQaBDhE/9GLCfOU5OOxtNukKtIk2SMPtNf8f15 K1o1zYgHC2c4/ixlXRAW5+5JR0uRTflJf436vPORmYM6zPYW X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index cf295bed3299..ae1677362421 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -848,6 +848,16 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ "ahb", "axi_m_sticky"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie0: pcie@20000000 { @@ -913,6 +923,16 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ "axi_m_sticky", "axi_s_sticky"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; };