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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1516; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=74MCy96nF03W7EAJTz2PT10B7QEkB+SqtG1CDRc9HX8=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ+qxeZoc8focG91fuD+QiwgTVXfYLbhfe8ah0En9E7Tdd 2eHs5zqZDRmYWDkYpAVU2TxKWiZGrMpOezDjqn1MINYmUCmMHBxCsBFvNj/cJSpqqwrZ7xzo1w2 50q+6cGaxe6ChiynXr6PiT62e3qM/wze1yInZWtf1PqcsdIU5fM/ofFlR4fKI2u5Ezeudm3yZv8 9zT3cWGjew1ePOyZwrPvq0lhk65xpU6jq92/nLoHa6rRpB+YWh3FpWC6xYav1PqK0UmjTO+X0zE 7eP4IP2gLfcpsVXrPP1r/cECD1TruuoPXrNnWGyS5CzefP3jBveK3K2nth1SRZ14nXohancVaue RHBE7fp1YxH+6MCn/Y0dCeer5rCcOno49g8n2zpedfN57y9fz3LpmCV+cmVnPcMLpsy7JtWeD+6 9nbjxxjWdUf9yudybkl7sDN3zn7+n++8UpRyo7YF5JYDAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 6c847fdff192..fc44979d7902 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2047,12 +2047,10 @@ ufshc: ufshc@624000 { power-domains = <&gcc UFS_GDSC>; clock-names = - "core_clk_src", "core_clk", "bus_clk", "bus_aggr_clk", "iface_clk", - "core_clk_unipro_src", "core_clk_unipro", "core_clk_ice", "ref_clk", @@ -2060,12 +2058,10 @@ ufshc: ufshc@624000 { "rx_lane0_sync_clk", "rx_lane1_sync_clk"; clocks = - <&gcc UFS_AXI_CLK_SRC>, <&gcc GCC_UFS_AXI_CLK>, <&gcc GCC_SYS_NOC_UFS_AXI_CLK>, <&gcc GCC_AGGRE2_UFS_AXI_CLK>, <&gcc GCC_UFS_AHB_CLK>, - <&gcc UFS_ICE_CORE_CLK_SRC>, <&gcc GCC_UFS_UNIPRO_CORE_CLK>, <&gcc GCC_UFS_ICE_CORE_CLK>, <&rpmcc RPM_SMD_LN_BB_CLK>, @@ -2074,8 +2070,6 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; freq-table-hz = <100000000 200000000>, - <100000000 200000000>, - <0 0>, <0 0>, <0 0>, <0 0>,