From patchwork Fri Jan 12 16:36:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 762230 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38DE276917 for ; Fri, 12 Jan 2024 16:36:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="oEc42AHT" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-40e67e90d4cso5997715e9.1 for ; Fri, 12 Jan 2024 08:36:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705077382; x=1705682182; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=68a0GULzTNp5I10XTHNXdWuvNz9Mn+A/t6I9BSr+hho=; b=oEc42AHT8EjnqGyNsHIEdPwI5UY+qJyG4TujOSQYO9iLtjkLVT/o19AQhSWsbsHG9b bAyBYE9Xc7bY68ntAgubzH5FPHFkvZOwSI0IpvLJQgf1MMOoA6tn6cFxm7hcXf6HPEql TNBcPNH7ZP6X16XPN/0ntzwuBOvlmlSE5HumdRu5PZnP3SFxYZ4z7xx7dB/WxwKhKtnm V9sP9apzqwUYxjwtzfXZdMWqfNVLe7kh5gzUJyjyt05bOsuP7EZpdt3YLuenI7GjJ9Ll 4jCWlbULj93ZMdo2Y9TXlqLU91lZ7CsJOROX/kWLKbN1iegLvkkW4k5ocp7lxuunwuno 7lkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705077382; x=1705682182; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=68a0GULzTNp5I10XTHNXdWuvNz9Mn+A/t6I9BSr+hho=; b=iVnRCSW0Xb63Az1DEYnkvEgreH7RQe0LKABWfioaR+cgI7gt7kGnrYNe56gjonFhA9 ID+8Ztmo66oB8IVFoDBg6dpo0nLDUC9tQzbDjR/2z0Smz54bJY3vcRVGC9CHnf7XqyQN eCJaoxgqzm6vWYZGDBZhvJDkpstOWJh/OfsdKeIwp4TgdMl/+2Yhe979dRqzKho2j2cr K/y1pNBu5h0QtISbHPjYSdlvMgub+ax1W/r199WbDMxAeN+yfY8RuD5LbWjro3zQc/kK 3IQdDqF98bZkAn6v3kvppa1w8+F1dvk+tuLqMSCA9EJOOUhXnoQYkrxdidBYrcerYeIe okJg== X-Gm-Message-State: AOJu0YwmCnqPZzSzIu2+eEA6wlM4mrMWXu+YO91kj0sF7Be2rDJ/ct0m j677onxdKg2RsIMbpbb/DLZUgufTRUTwhg== X-Google-Smtp-Source: AGHT+IExac0ZAkIrMJ702KpNYy5NUU3oncL7IAEWsPpn/98wL/uT9ZpKdi2Yd4czP8vgDvhHBxbJ1w== X-Received: by 2002:a05:600c:31a9:b0:40d:725a:994b with SMTP id s41-20020a05600c31a900b0040d725a994bmr659058wmp.174.1705077382570; Fri, 12 Jan 2024 08:36:22 -0800 (PST) Received: from krzk-bin.. ([178.197.223.112]) by smtp.gmail.com with ESMTPSA id bd16-20020a05600c1f1000b0040e5a93ae53sm6573195wmb.22.2024.01.12.08.36.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 08:36:22 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Rosin , Philipp Zabel , Jaroslav Kysela , Takashi Iwai , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Chris Packham , Sean Anderson Subject: [PATCH v3 1/5] reset: gpio: Add GPIO-based reset controller Date: Fri, 12 Jan 2024 17:36:04 +0100 Message-Id: <20240112163608.528453-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240112163608.528453-1-krzysztof.kozlowski@linaro.org> References: <20240112163608.528453-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a simple driver to control GPIO-based resets using the reset controller API for the cases when the GPIOs are shared and reset should be coordinated. The driver is expected to be used by reset core framework for ad-hoc reset controllers. Cc: Bartosz Golaszewski Cc: Chris Packham Cc: Sean Anderson Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bartosz Golaszewski --- MAINTAINERS | 5 ++ drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-gpio.c | 121 +++++++++++++++++++++++++++++++++++++ 4 files changed, 136 insertions(+) create mode 100644 drivers/reset/reset-gpio.c diff --git a/MAINTAINERS b/MAINTAINERS index 7fe27cd60e1b..a0fbd4814bc7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8866,6 +8866,11 @@ F: Documentation/i2c/muxes/i2c-mux-gpio.rst F: drivers/i2c/muxes/i2c-mux-gpio.c F: include/linux/platform_data/i2c-mux-gpio.h +GENERIC GPIO RESET DRIVER +M: Krzysztof Kozlowski +S: Maintained +F: drivers/reset/reset-gpio.c + GENERIC HDLC (WAN) DRIVERS M: Krzysztof Halasa S: Maintained diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index ccd59ddd7610..bb1b5a326eb7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -66,6 +66,15 @@ config RESET_BRCMSTB_RESCAL This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on BCM7216. +config RESET_GPIO + tristate "GPIO reset controller" + help + This enables a generic reset controller for resets attached via + GPIOs. Typically for OF platforms this driver expects "reset-gpios" + property. + + If compiled as module, it will be called reset-gpio. + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 8270da8a4baa..fd8b49fa46fc 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o +obj-$(CONFIG_RESET_GPIO) += reset-gpio.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o diff --git a/drivers/reset/reset-gpio.c b/drivers/reset/reset-gpio.c new file mode 100644 index 000000000000..0fe482740f1b --- /dev/null +++ b/drivers/reset/reset-gpio.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +struct reset_gpio_priv { + struct reset_controller_dev rc; + struct gpio_desc *reset; +}; + +static inline struct reset_gpio_priv +*rc_to_reset_gpio(struct reset_controller_dev *rc) +{ + return container_of(rc, struct reset_gpio_priv, rc); +} + +static int reset_gpio_assert(struct reset_controller_dev *rc, unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 1); + + return 0; +} + +static int reset_gpio_deassert(struct reset_controller_dev *rc, + unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 0); + + return 0; +} + +static int reset_gpio_status(struct reset_controller_dev *rc, unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + return gpiod_get_value_cansleep(priv->reset); +} + +static const struct reset_control_ops reset_gpio_ops = { + .assert = reset_gpio_assert, + .deassert = reset_gpio_deassert, + .status = reset_gpio_status, +}; + +static int reset_gpio_of_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + return reset_spec->args[0]; +} + +static void reset_gpio_of_node_put(void *data) +{ + of_node_put(data); +} + +static int reset_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct of_phandle_args *platdata = dev_get_platdata(dev); + struct reset_gpio_priv *priv; + int ret; + + if (!platdata) + return -EINVAL; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + platform_set_drvdata(pdev, &priv->rc); + + /* Relies on GPIO_LOOKUP */ + priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(priv->reset)) + return dev_err_probe(dev, PTR_ERR(priv->reset), + "Could not get reset gpios\n"); + + priv->rc.ops = &reset_gpio_ops; + priv->rc.owner = THIS_MODULE; + priv->rc.dev = dev; + priv->rc.of_args = platdata; + priv->rc.of_node = of_node_get(platdata->np); + ret = devm_add_action_or_reset(dev, reset_gpio_of_node_put, + priv->rc.of_node); + if (ret) + return ret; + + /* Cells to match GPIO specifier, but it's not really used */ + priv->rc.of_reset_n_cells = 2; + priv->rc.of_xlate = reset_gpio_of_xlate; + priv->rc.nr_resets = 1; + + return devm_reset_controller_register(dev, &priv->rc); +} + +static const struct platform_device_id reset_gpio_ids[] = { + { .name = "reset-gpio", }, + {} +}; +MODULE_DEVICE_TABLE(platform, reset_gpio_ids); + +static struct platform_driver reset_gpio_driver = { + .probe = reset_gpio_probe, + .id_table = reset_gpio_ids, + .driver = { + .name = "reset-gpio", + }, +}; +module_platform_driver(reset_gpio_driver); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("Generic GPIO reset driver"); +MODULE_LICENSE("GPL");