From patchwork Fri Dec 22 04:39:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 757516 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5338C524F; Fri, 22 Dec 2023 04:39:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Hf/9gkFh" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 3BM4PsdO000898; Fri, 22 Dec 2023 04:39:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=Hdhf/vukbF6VN3w1T8nt2R0QIovuK/C1DMcwBN9byko =; b=Hf/9gkFh7mslhPiZyJCfJnvUQpShQfY6bPfgrT+bI52joS/mw+FvwTpUBjB IdVeXFhoTM5VgrxRY+H+CJJEk57Wjm8mvCZN3/BEEgw6D+l70cJqmNHIa+anFJry DbjY8GBAsCY5QvxM1ROfkCUTd2DMhXVMQSJJiNP4F4mrN8loAU1SW7pK1hhpjQIS mVU4lEwymlf5mrhQjPlYWyCF3Qh0SItatOWaS7lNGKNmuOm1hV7NoJFdKVADFUHZ l9HMeS8uV0t8kV7nzErtvEMeGPbo9HxbcJ94aN7UWNRl+W6U4kSp4N/XKBbM4wL0 O64exNYnlRGjRkoDA00jOFXgsxw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3v4xpq8hu5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Dec 2023 04:39:27 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3BM4dQiD029455 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Dec 2023 04:39:26 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 21 Dec 2023 20:39:25 -0800 From: Bjorn Andersson Date: Thu, 21 Dec 2023 20:39:28 -0800 Subject: [PATCH v2 7/8] arm64: dts: qcom: sa8295p-adp: Enable GPU Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231220-sa8295p-gpu-v2-7-4763246b72c0@quicinc.com> References: <20231220-sa8295p-gpu-v2-0-4763246b72c0@quicinc.com> In-Reply-To: <20231220-sa8295p-gpu-v2-0-4763246b72c0@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Taniya Das , Ulf Hansson , Johan Hovold , "Catalin Marinas" , Will Deacon CC: , , , , , , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1703219963; l=1206; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=dD0GcfAbQWB/Byxom1p5BHXW6AYuvh2caz6aOAzFafc=; b=wdt7APMlRp9v9bLZyPfHYFZadpcjHEggqzOrq9Ty5sjfDthOG+tpPBELJQRH+itmQAuyHJo2AhLB TXqzlIu6DP70erykVwK6gb832FieE7SmddyCAMuuTWo4aYES4+EZ X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: d7qY4yyaZNIASqca0fHnBBMWUKvEMsmA X-Proofpoint-ORIG-GUID: d7qY4yyaZNIASqca0fHnBBMWUKvEMsmA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 mlxscore=0 spamscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 mlxlogscore=864 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312220029 With the necessary support in place for supplying VDD_GFX from the MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU and the GPU on the SA8295P ADP. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 14327c697116..304c8d79bd31 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -108,6 +108,13 @@ edp3_connector_in: endpoint { }; }; }; + + reserved-memory { + gpu_mem: gpu-mem@8bf00000 { + reg = <0 0x8bf00000 0 0x2000>; + no-map; + }; + }; }; &apps_rsc { @@ -286,6 +293,28 @@ vdd_gfx: regulator@39 { }; }; +&gpucc { + vdd-gfx-supply = <&vdd_gfx>; + status = "okay"; +}; + +&gmu { + status = "okay"; +}; + +&gpu { + status = "okay"; + + zap-shader { + memory-region = <&gpu_mem>; + firmware-name = "qcom/sa8295p/a690_zap.mbn"; + }; +}; + +&gpu_smmu { + status = "okay"; +}; + &mdss0 { status = "okay"; };