diff mbox series

[RFT,v2,4/4] drm/msm/dpu: enable writeback on SM6350

Message ID 20231203003203.1293087-5-dmitry.baryshkov@linaro.org
State Accepted
Commit 15302579373ed2c8ada629e9e7bcf9569393a48d
Headers show
Series drm/msm/dpu: enable writeback on the other platforms | expand

Commit Message

Dmitry Baryshkov Dec. 3, 2023, 12:32 a.m. UTC 
Enable WB2 hardware block, enabling writeback support on this platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 .../drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Luca Weiss Dec. 19, 2023, 3:39 p.m. UTC | #1 
On Sun Dec 3, 2023 at 1:32 AM CET, Dmitry Baryshkov wrote:
> Enable WB2 hardware block, enabling writeback support on this platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Hi Dmitry,

I've tried this on sm7225-fairphone-fp4 but having trouble testing this.

I guess I'm using some ID wrong with modetest, could you check and see
what I do wrong?

libdrm is on version 2.4.118 from Alpine Linux/postmarketOS, kernel is
v6.7.0-rc6 plus a few patches for hardware enablement (like display).

See log:

fairphone-fp4:~$ sudo modetest -ac
trying to open device 'i915'...failed
trying to open device 'amdgpu'...failed
trying to open device 'radeon'...failed
trying to open device 'nouveau'...failed
trying to open device 'vmwgfx'...failed
trying to open device 'omapdrm'...failed
trying to open device 'exynos'...failed
trying to open device 'tilcdc'...failed
trying to open device 'msm'...done
Connectors:
id      encoder status          name            size (mm)       modes   encoders
32      31      connected       DSI-1           65x115          1       31
  modes:
        index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot
  #0 1080x2340 60.00 1080 1108 1116 1124 2340 2367 2372 2377 160304 flags: ; type: preferred, driver
  props:
        1 EDID:
                flags: immutable blob
                blobs:

                value:
        2 DPMS:
                flags: enum
                enums: On=0 Standby=1 Suspend=2 Off=3
                value: 0
        5 link-status:
                flags: enum
                enums: Good=0 Bad=1
                value: 0
        6 non-desktop:
                flags: immutable range
                values: 0 1
                value: 0
        4 TILE:
                flags: immutable blob
                blobs:

                value:
        20 CRTC_ID:
                flags: object
                value: 63
38      0       unknown Writeback-1     0x0             0       33
  props:
        2 DPMS:
                flags: enum
                enums: On=0 Standby=1 Suspend=2 Off=3
                value: 0
        5 link-status:
                flags: enum
                enums: Good=0 Bad=1
                value: 0
        6 non-desktop:
                flags: immutable range
                values: 0 1
                value: 0
        4 TILE:
                flags: immutable blob
                blobs:

                value:
        20 CRTC_ID:
                flags: object
                value: 0
        36 WRITEBACK_OUT_FENCE_PTR:
                flags: range
                values: 0 18446744073709551615
                value: 0
        34 WRITEBACK_FB_ID:
                flags: object
                value: 0
        35 WRITEBACK_PIXEL_FORMATS:
                flags: immutable blob
                blobs:

                value:
                        52473136424731365247323441523234
                        52413234414232345852323452583234
                        58423234415231355241313558523135
                        52583135415231325241313252583132
                        58523132424731364247323441423234
                        42413234425832345842323441423135
                        42413135584231354258313541423132
                        424131324258313258423132



fairphone-fp4:~$ sudo cat /sys/kernel/debug/dri/0/state
plane[39]: plane-0
        crtc=crtc-0
        fb=66
                allocated by = phoc
                refcount=2
                format=XR24 little-endian (0x34325258)
                modifier=0x500000000000001
                size=1080x2340
                layers:
                        size[0]=1080x2340
                        pitch[0]=4352
                        offset[0]=0
                        obj[0]:
                                name=0
                                refcount=3
                                start=00101fec
                                size=10485760
                                imported=no
        crtc-pos=1080x2340+0+0
        src-pos=1080.000000x2340.000000+0.000000+0.000000
        rotation=1
        normalized-zpos=0
        color-encoding=ITU-R BT.601 YCbCr
        color-range=YCbCr limited range
        stage=1
        sspp[0]=sspp_0
        multirect_mode[0]=none
        multirect_index[0]=solo
        src[0]=1080x2340+0+0
        dst[0]=1080x2340+0+0
plane[45]: plane-1
        crtc=(null)
        fb=0
        crtc-pos=0x0+0+0
        src-pos=0.000000x0.000000+0.000000+0.000000
        rotation=1
        normalized-zpos=0
        color-encoding=ITU-R BT.601 YCbCr
        color-range=YCbCr limited range
        stage=0
        sspp[0]=sspp_8
        multirect_mode[0]=none
        multirect_index[0]=solo
        src[0]=0x0+0+0
        dst[0]=0x0+0+0
plane[51]: plane-2
        crtc=(null)
        fb=0
        crtc-pos=0x0+0+0
        src-pos=0.000000x0.000000+0.000000+0.000000
        rotation=1
        normalized-zpos=0
        color-encoding=ITU-R BT.601 YCbCr
        color-range=YCbCr limited range
        stage=0
        sspp[0]=sspp_9
        multirect_mode[0]=none
        multirect_index[0]=solo
        src[0]=0x0+0+0
        dst[0]=0x0+0+0
plane[57]: plane-3
        crtc=(null)
        fb=0
        crtc-pos=0x0+0+0
        src-pos=0.000000x0.000000+0.000000+0.000000
        rotation=1
        normalized-zpos=0
        color-encoding=ITU-R BT.601 YCbCr
        color-range=YCbCr limited range
        stage=0
        sspp[0]=sspp_10
        multirect_mode[0]=none
        multirect_index[0]=solo
        src[0]=0x0+0+0
        dst[0]=0x0+0+0
crtc[63]: crtc-0
        enable=1
        active=1
        self_refresh_active=0
        planes_changed=1
        mode_changed=0
        active_changed=0
        connectors_changed=0
        color_mgmt_changed=0
        plane_mask=1
        connector_mask=1
        encoder_mask=1
        mode: "1080x2340": 60 160304 1080 1108 1116 1124 2340 2367 2372 2377 0x48 0x0
        lm[0]=0
        ctl[0]=0
crtc[64]: crtc-1
        enable=0
        active=0
        self_refresh_active=0
        planes_changed=0
        mode_changed=0
        active_changed=0
        connectors_changed=0
        color_mgmt_changed=0
        plane_mask=0
        connector_mask=0
        encoder_mask=0
        mode: "": 0 0 0 0 0 0 0 0 0 0 0x0 0x0
connector[32]: DSI-1
        crtc=crtc-0
        self_refresh_aware=0
        max_requested_bpc=0
        colorspace=Default
connector[38]: Writeback-1
        crtc=(null)
        self_refresh_aware=0
        max_requested_bpc=0
        colorspace=Default


fairphone-fp4:~$ sudo modetest -M msm -a -s 38@64:1080x2340 -o test.d -P 45@64:1080x2340
failed to find mode "1080x2340" for connector 38
no mode for writeback
failed to set gamma: Permission denied
testing 1080x2340@XR24 on plane 45, crtc 64
Atomic Commit failed [1]

Regards
Luca


> ---
>  .../drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> index 62db84bd15f2..3c179a73c030 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> @@ -27,6 +27,7 @@ static const struct dpu_mdp_cfg sm6350_mdp = {
>  		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
>  		[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
>  		[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
> +		[DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
>  		[DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
>  	},
>  };
> @@ -146,6 +147,21 @@ static const struct dpu_dsc_cfg sm6350_dsc[] = {
>  	},
>  };
>  
> +static const struct dpu_wb_cfg sm6350_wb[] = {
> +	{
> +		.name = "wb_2", .id = WB_2,
> +		.base = 0x65000, .len = 0x2c8,
> +		.features = WB_SM8250_MASK,
> +		.format_list = wb2_formats,
> +		.num_formats = ARRAY_SIZE(wb2_formats),
> +		.clk_ctrl = DPU_CLK_CTRL_WB2,
> +		.xin_id = 6,
> +		.vbif_idx = VBIF_RT,
> +		.maxlinewidth = 1920,
> +		.intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
> +	},
> +};
> +
>  static const struct dpu_intf_cfg sm6350_intf[] = {
>  	{
>  		.name = "intf_0", .id = INTF_0,
> @@ -219,6 +235,8 @@ const struct dpu_mdss_cfg dpu_sm6350_cfg = {
>  	.dsc = sm6350_dsc,
>  	.pingpong_count = ARRAY_SIZE(sm6350_pp),
>  	.pingpong = sm6350_pp,
> +	.wb_count = ARRAY_SIZE(sm6350_wb),
> +	.wb = sm6350_wb,
>  	.intf_count = ARRAY_SIZE(sm6350_intf),
>  	.intf = sm6350_intf,
>  	.vbif_count = ARRAY_SIZE(sdm845_vbif),
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index 62db84bd15f2..3c179a73c030 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -27,6 +27,7 @@  static const struct dpu_mdp_cfg sm6350_mdp = {
 		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
 		[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
 		[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
+		[DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
 		[DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
 	},
 };
@@ -146,6 +147,21 @@  static const struct dpu_dsc_cfg sm6350_dsc[] = {
 	},
 };
 
+static const struct dpu_wb_cfg sm6350_wb[] = {
+	{
+		.name = "wb_2", .id = WB_2,
+		.base = 0x65000, .len = 0x2c8,
+		.features = WB_SM8250_MASK,
+		.format_list = wb2_formats,
+		.num_formats = ARRAY_SIZE(wb2_formats),
+		.clk_ctrl = DPU_CLK_CTRL_WB2,
+		.xin_id = 6,
+		.vbif_idx = VBIF_RT,
+		.maxlinewidth = 1920,
+		.intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+	},
+};
+
 static const struct dpu_intf_cfg sm6350_intf[] = {
 	{
 		.name = "intf_0", .id = INTF_0,
@@ -219,6 +235,8 @@  const struct dpu_mdss_cfg dpu_sm6350_cfg = {
 	.dsc = sm6350_dsc,
 	.pingpong_count = ARRAY_SIZE(sm6350_pp),
 	.pingpong = sm6350_pp,
+	.wb_count = ARRAY_SIZE(sm6350_wb),
+	.wb = sm6350_wb,
 	.intf_count = ARRAY_SIZE(sm6350_intf),
 	.intf = sm6350_intf,
 	.vbif_count = ARRAY_SIZE(sdm845_vbif),