From patchwork Tue Nov 21 05:35:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 745784 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="QP0ehrOX" Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74879116; Mon, 20 Nov 2023 21:36:01 -0800 (PST) Received: from fews02-sea.riseup.net (fews02-sea-pn.riseup.net [10.0.1.112]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4SZClh4vxNzDr01; Tue, 21 Nov 2023 05:36:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1700544961; bh=jh3rezL5S7sb/M4VMN5CMI7+Ql0qBTS4jIusFA4OTRQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QP0ehrOXgEkr/lkJEK2u1Y9zeYIevS2W27ALmoKt7dOPHYivv1PjYI6+EBV5nqxa6 +9JLyhxs6hfO8DwNLCWc523FWSqaCWSDz/J6nHVCDjE8Z5mY6SGs0PXHRd+Yq+oWPF sto0Hk0GUSQ3hVhhRF3G4AaN0C2woUDg7VllsZOo= X-Riseup-User-ID: 3E01EE7485026F2FC8F12AC2D886177E4C57932B1DEB81578F8D5C2E5591D05C Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews02-sea.riseup.net (Postfix) with ESMTPSA id 4SZCld5X2bzFvkn; Tue, 21 Nov 2023 05:35:57 +0000 (UTC) From: Dang Huynh Date: Tue, 21 Nov 2023 12:35:01 +0700 Subject: [PATCH v2 3/4] arm64: dts: qcom: Add PM8937 PMIC Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231121-pm8937-v2-3-b0171ab62075@riseup.net> References: <20231121-pm8937-v2-0-b0171ab62075@riseup.net> In-Reply-To: <20231121-pm8937-v2-0-b0171ab62075@riseup.net> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Dang Huynh , Dmitry Baryshkov The PM8937 features integrated peripherals like ADC, GPIO controller, MPPs, PON keys and others. Add the device tree so that any boards with this PMIC can use it. Reviewed-by: Dmitry Baryshkov Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/pm8937.dtsi | 216 +++++++++++++++++++++++++++++++++++ 1 file changed, 216 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8937.dtsi b/arch/arm64/boot/dts/qcom/pm8937.dtsi new file mode 100644 index 000000000000..34e2b4cd0d5f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm8937.dtsi @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Dang Huynh + */ + +#include +#include +#include +#include +#include + +/ { + thermal-zones { + pm8937-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm8937_temp>; + + trips { + trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm8937", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pm8937_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + + pm8937_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + pm8937_gpios: gpio@c000 { + compatible = "qcom,pm8937-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + gpio-ranges = <&pm8937_gpios 0 0 8>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8937_mpps: mpps@a000 { + compatible = "qcom,pm8937-mpp", "qcom,spmi-mpp"; + reg = <0xa000>; + gpio-controller; + gpio-ranges = <&pm8937_mpps 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8937_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8937_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm8937_vadc: adc@3100 { + compatible = "qcom,spmi-vadc"; + reg = <0x3100>; + interrupts = <0 0x31 0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + channel@5 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vcoin"; + }; + + channel@7 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vph_pwr"; + }; + + channel@8 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + + channel@9 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_625mv"; + }; + + channel@a { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_1250mv"; + }; + + channel@c { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_buf_625mv"; + }; + + channel@e { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + channel@f { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_vdd"; + }; + + channel@11 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "pa_therm1"; + }; + + channel@13 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "case_therm"; + }; + + channel@32 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "xo_therm"; + }; + + channel@36 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "pa_therm0"; + }; + + channel@3c { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "xo_therm_buf"; + }; + }; + + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + }; + }; + + pmic@1 { + compatible = "qcom,pm8937", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8937_spmi_regulators: regulators { + compatible = "qcom,pm8937-regulators"; + }; + }; +};