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([178.197.218.126]) by smtp.gmail.com with ESMTPSA id k25-20020aa7c059000000b0053dd8898f75sm1161917edo.81.2023.11.11.08.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Nov 2023 08:42:37 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 4/6] arm64: dts: qcom: sm6115: align mem timer size cells with bindings Date: Sat, 11 Nov 2023 17:42:27 +0100 Message-Id: <20231111164229.63803-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231111164229.63803-1-krzysztof.kozlowski@linaro.org> References: <20231111164229.63803-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Commit 70d1e09ebf19 ("arm64: dts: qcom: sm6115: Use 64 bit addressing") converted all addresses to 64-bit addressing, but the ARMv7 memory mapped architected timer bindings expect sizes up to 32-bit. Keep 64-bit addressing but change size of memory mapping to 32-bit (size-cells=1) and adjust the ranges to match this. This fixes dtbs_check warnings like: sm6115p-lenovo-j606f.dtb: timer@f120000: #size-cells:0:0: 1 was expected Signed-off-by: Krzysztof Kozlowski --- I hope I got the ranges right. Not tested on hardware. --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 20dec687fa3b..ed6065ccd214 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -2559,54 +2559,54 @@ timer@f120000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x0f120000 0x0 0x1000>; #address-cells = <2>; - #size-cells = <2>; - ranges; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x0 0x20000000>; clock-frequency = <19200000>; frame@f121000 { - reg = <0x0 0x0f121000 0x0 0x1000>, <0x0 0x0f122000 0x0 0x1000>; + reg = <0x0 0x0f121000 0x1000>, <0x0 0x0f122000 0x1000>; frame-number = <0>; interrupts = , ; }; frame@f123000 { - reg = <0x0 0x0f123000 0x0 0x1000>; + reg = <0x0 0x0f123000 0x1000>; frame-number = <1>; interrupts = ; status = "disabled"; }; frame@f124000 { - reg = <0x0 0x0f124000 0x0 0x1000>; + reg = <0x0 0x0f124000 0x1000>; frame-number = <2>; interrupts = ; status = "disabled"; }; frame@f125000 { - reg = <0x0 0x0f125000 0x0 0x1000>; + reg = <0x0 0x0f125000 0x1000>; frame-number = <3>; interrupts = ; status = "disabled"; }; frame@f126000 { - reg = <0x0 0x0f126000 0x0 0x1000>; + reg = <0x0 0x0f126000 0x1000>; frame-number = <4>; interrupts = ; status = "disabled"; }; frame@f127000 { - reg = <0x0 0x0f127000 0x0 0x1000>; + reg = <0x0 0x0f127000 0x1000>; frame-number = <5>; interrupts = ; status = "disabled"; }; frame@f128000 { - reg = <0x0 0x0f128000 0x0 0x1000>; + reg = <0x0 0x0f128000 0x1000>; frame-number = <6>; interrupts = ; status = "disabled";