From patchwork Tue Oct 17 09:27:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 734494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 378C4CDB482 for ; Tue, 17 Oct 2023 09:28:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343727AbjJQJ2b (ORCPT ); Tue, 17 Oct 2023 05:28:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234840AbjJQJ2D (ORCPT ); Tue, 17 Oct 2023 05:28:03 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE3A5122 for ; Tue, 17 Oct 2023 02:27:56 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id 38308e7fff4ca-2c4fe37f166so61948831fa.1 for ; Tue, 17 Oct 2023 02:27:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1697534874; x=1698139674; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lH1sZwRo7QEIPRBoUHgIgC70+qzWsBOkYQusaG/ALss=; b=xtNJeRBB2Foc21/vSm6ueef/S92zZ9P94tP/EfXv3CCkw00JrnTtZ/BakDn7H8wmpT fF5zQ3p8DVOXldCMpfVTtX+J7gAh+aTS+Cgy9R3RGObHw69EJqeIi3N9I9trFgibwu4D ujwe42X93KRHZTAPOz9yrdiLdhP+ab8SihM4cTIdsaiT/9HgPFY5TFK88lDZtL+5R1FU HRpbTK09ra7rwNJgafRhpvkks1UeY0NOYPnVTGpy+VoPyp6EZrb/fTeOnXIMxPVCuXgR NxbkPbF+sOroBjXp7wUw9m1ioYsU5lo9+QQDLdRjXDxTKiGL3H3BBwYtzNASw/oYszfS ADaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697534874; x=1698139674; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lH1sZwRo7QEIPRBoUHgIgC70+qzWsBOkYQusaG/ALss=; b=SGDmuTOpnn5MII59NwQOq07FMFER3Xu8OESmBh+pf2VsqALhSCzq0qwbsdRAaQbOfV xu3h3olQuz7qoLDKubEc9Y7jyDIpT1U/LlgmuzgFmQyGrVI3Ib1TZtU2q7vW3JzPTRyr 8dQoHBMEc8ai4G9I7/c1vGNgnoAilDWQYrJmd9LeX+aRxf7V57S8NUa3ktcz4+5+21mE YlZJJSelgHZSEGALW68CEFcwd+CuOiqt4jJaXGVOf/EPWUMOwneSXglZIbHjnh6ukLi3 F8ujz++CZzIrrglm3VIW6l46N9sMfNBdZWkk/B2mmo85yiHC/YfKYIF2iFKbVz/sPyLP OpmQ== X-Gm-Message-State: AOJu0YzwuPVG7Jofvda6dPcIDRlnTC4mnv2GJC6NFze/Sszt/amvCrE/ TZoOpRy28cQMiud4a9EWHO4Y8A== X-Google-Smtp-Source: AGHT+IFMnsoZTr0gCda3WphosvnSaVWKUn1wmH8Se8PR8EHHE7NaF6qkxMUjNOU5KvY9xhu2LYXVwA== X-Received: by 2002:a2e:6a12:0:b0:2c5:6c7:9e73 with SMTP id f18-20020a2e6a12000000b002c506c79e73mr1332354ljc.48.1697534874495; Tue, 17 Oct 2023 02:27:54 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:f1ee:b000:ce90:ed14]) by smtp.gmail.com with ESMTPSA id j5-20020a05600c1c0500b003fe1c332810sm9460787wms.33.2023.10.17.02.27.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 02:27:53 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [PATCH v5 13/15] firmware: qcom: tzmem: enable SHM Bridge support Date: Tue, 17 Oct 2023 11:27:30 +0200 Message-Id: <20231017092732.19983-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231017092732.19983-1-brgl@bgdev.pl> References: <20231017092732.19983-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add a new Kconfig option for selecting the SHM Bridge mode of operation for the TrustZone memory allocator. If enabled at build-time, it will still be checked for availability at run-time. If the architecture doesn't support SHM Bridge, the allocator will work just like in the default mode. Signed-off-by: Bartosz Golaszewski Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/Kconfig | 10 +++++ drivers/firmware/qcom/qcom_tzmem.c | 65 +++++++++++++++++++++++++++++- 2 files changed, 74 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 237da40de832..e01407e31ae4 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -27,6 +27,16 @@ config QCOM_TZMEM_MODE_DEFAULT Use the default allocator mode. The memory is page-aligned, non-cachable and contiguous. +config QCOM_TZMEM_MODE_SHMBRIDGE + bool "SHM Bridge" + help + Use Qualcomm Shared Memory Bridge. The memory has the same alignment as + in the 'Default' allocator but is also explicitly marked as an SHM Bridge + buffer. + + With this selected, all buffers passed to the TrustZone must be allocated + using the TZMem allocator or else the TrustZone will refuse to use them. + endchoice config QCOM_SCM_DOWNLOAD_MODE_DEFAULT diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qcom_tzmem.c index 68ca59c5598e..8010af80fd59 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -55,7 +55,70 @@ static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) } -#endif /* CONFIG_QCOM_TZMEM_MODE_DEFAULT */ +#elif IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE) + +#include + +#define QCOM_SHM_BRIDGE_NUM_VM_SHIFT 9 + +static bool qcom_tzmem_using_shm_bridge; + +static int qcom_tzmem_init(void) +{ + int ret; + + ret = qcom_scm_shm_bridge_enable(); + if (ret == -EOPNOTSUPP) { + dev_info(qcom_tzmem_dev, "SHM Bridge not supported\n"); + return 0; + } + + if (!ret) + qcom_tzmem_using_shm_bridge = true; + + return ret; +} + +static int qcom_tzmem_init_pool(struct qcom_tzmem_pool *pool) +{ + u64 pfn_and_ns_perm, ipfn_and_s_perm, size_and_flags, ns_perms; + int ret; + + if (!qcom_tzmem_using_shm_bridge) + return 0; + + ns_perms = (QCOM_SCM_PERM_WRITE | QCOM_SCM_PERM_READ); + pfn_and_ns_perm = (u64)pool->pbase | ns_perms; + ipfn_and_s_perm = (u64)pool->pbase | ns_perms; + size_and_flags = pool->size | (1 << QCOM_SHM_BRIDGE_NUM_VM_SHIFT); + + u64 *handle __free(kfree) = kzalloc(sizeof(*handle), GFP_KERNEL); + if (!handle) + return -ENOMEM; + + ret = qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm, + ipfn_and_s_perm, size_and_flags, + QCOM_SCM_VMID_HLOS, handle); + if (ret) + return ret; + + pool->priv = no_free_ptr(handle); + + return 0; +} + +static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) +{ + u64 *handle = pool->priv; + + if (!qcom_tzmem_using_shm_bridge) + return; + + qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle); + kfree(handle); +} + +#endif /* CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE */ /** * qcom_tzmem_pool_new() - Create a new TZ memory pool.