From patchwork Sat Oct 7 13:58:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wronek X-Patchwork-Id: 730389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 002BAE95A67 for ; Sat, 7 Oct 2023 14:01:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344038AbjJGOBY (ORCPT ); Sat, 7 Oct 2023 10:01:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343993AbjJGOBG (ORCPT ); Sat, 7 Oct 2023 10:01:06 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F10DBC; Sat, 7 Oct 2023 07:01:05 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-405524e6768so29830615e9.2; Sat, 07 Oct 2023 07:01:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1696687264; x=1697292064; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Cp/w9tRifckqyMe+/sK13v+Eni6uaKZUbFHKhF2GUQM=; b=X6pJwEbbfp2Ns4pO6+OQEziRMMU2VLtceKM/KOvaH2Y/j5zWJXeuZXYhaJCRBahXGC JoR22lWHC3YMETqGUBvhfBaybjWoKhufz3PMoZSSlLDYyEeVb1dsF2OD/WPXKg3j0fZb 8flG5dbgOpFAFoEURcXFFGRDs8kjNctnqu7Mk6KrBKGfhfN8iUn0frizIJTlCKMgu6T3 KNjy/3eNCyYEc8iyaeruD90DyV+IrrJCFciPbZQ6qoricUTegJZgMZI+T2DWqCHRaoaw 5B30F9UWaVI+pxmpRuHMlCZcFPs5aftRUT+IpTuA1xD2z4WpoeKtC5JGkksGTMvVTw1H T1lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696687264; x=1697292064; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Cp/w9tRifckqyMe+/sK13v+Eni6uaKZUbFHKhF2GUQM=; b=RCDt7RX8T36Gonfg5lWS6RJdSk9yONn6zZNrA5pO+wtDLMeS4sLkmSE+33pGbaEaXs KxGyM1Qm4yVkgYhKyvYbSC/j0m+BP3y+Nu9L/bujMQuj6oEedy2J4W5RsHT/UHyWYjUH tbq5FY1jmRDTrfXmkhfIn3uLbi+cXWPOL8OAhF2qEIHesCmaR9oEh8K0GV5QmrFghZgF PvSWqgb9EQc9aOD1icKPnWkR1FSqIBh2b0NRAZnziGDMHh2ozoHLc9XqqYbYuI9yHbiK XCS2KK6BKQwAJ17FmmZPrcPmHMIyt+b3/ofgMSl/0BM0BUaNKAivNaHYYtvaCGdlQ9Oc hBGw== X-Gm-Message-State: AOJu0Yw8vV7GdD3q3HRoPhasnSshPk9wEWn5srabM1yyqT1uFRh2EPWC es9Clz5vZ5gXikmp+zpKoSM= X-Google-Smtp-Source: AGHT+IE0WL+cWTW3NGWt1ZiTCgreLUxlk1FxmNYI7gq1+dtvcI1CRLU4KKZR6fIGQtfjgXaYYpjDmg== X-Received: by 2002:a1c:ed17:0:b0:402:ea6a:c955 with SMTP id l23-20020a1ced17000000b00402ea6ac955mr9726852wmh.8.1696687263592; Sat, 07 Oct 2023 07:01:03 -0700 (PDT) Received: from david-ryuzu.fritz.box ([77.22.112.104]) by smtp.googlemail.com with ESMTPSA id q8-20020a05600000c800b0032415213a6fsm4332043wrx.87.2023.10.07.07.01.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 07:01:03 -0700 (PDT) From: David Wronek To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , Joe Mason Cc: cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org, hexdump0815@googlemail.com, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, David Wronek Subject: [PATCH 5/7] arm64: dts: qcom: sc7180: Add UFS nodes Date: Sat, 7 Oct 2023 15:58:29 +0200 Message-ID: <20231007140053.1731245-6-davidwronek@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231007140053.1731245-1-davidwronek@gmail.com> References: <20231007140053.1731245-1-davidwronek@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the UFS and QMP PHY nodes for the Qualcomm SC7180 SoC. Signed-off-by: David Wronek --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 70 ++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 11f353d416b4..9f18be4fd61a 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1532,6 +1532,76 @@ mmss_noc: interconnect@1740000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + ufs_mem_hc: ufshc@1d84000 { + compatible = "qcom,sc7180-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x3000>, + <0 0x01d90000 0 0x8000>; + reg-names = "std", "ice"; + interrupts = ; + phys = <&ufs_mem_phy>; + phy-names = "ufsphy"; + lanes-per-direction = <1>; + power-domains = <&gcc UFS_PHY_GDSC>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + iommus = <&apps_smmu 0xa0 0x0>; + + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "ice_core_clk"; + clocks = + <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + freq-table-hz = + <50000000 200000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <0 300000000>; + + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + + status = "disabled"; + }; + + ufs_mem_phy: phy@1d87000 { + compatible = "qcom,sc7180-qmp-ufs-phy"; + reg = <0 0x01d87000 0 0x1000>; + + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clock-names = "ref", "ref_aux"; + + power-domains = <&gcc UFS_PHY_GDSC>; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + + #phy-cells = <0>; + + status = "disabled"; + }; + ipa: ipa@1e40000 { compatible = "qcom,sc7180-ipa";