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[178.235.177.61]) by smtp.gmail.com with ESMTPSA id n4-20020a056402060400b0052a3ad836basm4681281edv.41.2023.09.11.08.10.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Sep 2023 08:10:41 -0700 (PDT) From: Konrad Dybcio Date: Mon, 11 Sep 2023 17:10:22 +0200 Subject: [PATCH RFT 08/20] media: venus: core: Constify all members of the resource struct MIME-Version: 1.0 Message-Id: <20230911-topic-mars-v1-8-a7d38bf87bdb@linaro.org> References: <20230911-topic-mars-v1-0-a7d38bf87bdb@linaro.org> In-Reply-To: <20230911-topic-mars-v1-0-a7d38bf87bdb@linaro.org> To: Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , Dikshita Agarwal , Philipp Zabel Cc: Marijn Suijten , Stanimir Varbanov , Mauro Carvalho Chehab , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1694445027; l=2695; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=W0g0byTl6c4puFfQRs30LwSqiMEXDbtkmuwi72umncI=; b=h+Lq+Zn8i1er1pX71A5d9g50NTac8o2WQ32FO2tyoRiMIEanxulG/HCnQs9kEGCslGEsXACs1 S5RLewuAk2JDxlr5PAQwqtuJGb+EIBjLWo3Vlc/hYGQBhvKN7+QaJ7r X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Nothing inside the resource struct needs to be mutable. Sprinkle 'const' all over it. A lot of 'const'. Signed-off-by: Konrad Dybcio --- drivers/media/platform/qcom/venus/core.h | 56 ++++++++++++++++---------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 515e7d78b7ab..9a38d568117a 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -57,39 +57,39 @@ enum vpu_version { }; struct venus_resources { - u64 dma_mask; - const struct freq_tbl *freq_tbl; - unsigned int freq_tbl_size; - const struct bw_tbl *bw_tbl_enc; - unsigned int bw_tbl_enc_size; - const struct bw_tbl *bw_tbl_dec; - unsigned int bw_tbl_dec_size; - const struct reg_val *reg_tbl; - unsigned int reg_tbl_size; - const struct hfi_ubwc_config *ubwc_conf; + const u64 dma_mask; + const struct freq_tbl * const freq_tbl; + const unsigned int freq_tbl_size; + const struct bw_tbl * const bw_tbl_enc; + const unsigned int bw_tbl_enc_size; + const struct bw_tbl * const bw_tbl_dec; + const unsigned int bw_tbl_dec_size; + const struct reg_val * const reg_tbl; + const unsigned int reg_tbl_size; + const struct hfi_ubwc_config * const ubwc_conf; const char * const clks[VIDC_CLKS_NUM_MAX]; - unsigned int clks_num; + const unsigned int clks_num; const char * const vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; const char * const vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX]; - unsigned int vcodec_clks_num; + const unsigned int vcodec_clks_num; const char * const vcodec_pmdomains[VIDC_PMDOMAINS_NUM_MAX]; - unsigned int vcodec_pmdomains_num; - const char **opp_pmdomain; - unsigned int vcodec_num; + const unsigned int vcodec_pmdomains_num; + const char * const * const opp_pmdomain; + const unsigned int vcodec_num; const char * const resets[VIDC_RESETS_NUM_MAX]; - unsigned int resets_num; - enum hfi_version hfi_version; - enum vpu_version vpu_version; - u8 num_vpp_pipes; - u32 max_load; - unsigned int vmem_id; - u32 vmem_size; - u32 vmem_addr; - u32 cp_start; - u32 cp_size; - u32 cp_nonpixel_start; - u32 cp_nonpixel_size; - const char *fwname; + const unsigned int resets_num; + const enum hfi_version hfi_version; + const enum vpu_version vpu_version; + const u8 num_vpp_pipes; + const u32 max_load; + const unsigned int vmem_id; + const u32 vmem_size; + const u32 vmem_addr; + const u32 cp_start; + const u32 cp_size; + const u32 cp_nonpixel_start; + const u32 cp_nonpixel_size; + const char * const fwname; }; enum venus_fmt {