From patchwork Tue Sep 5 01:25:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 720179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E21E1CA0FFE for ; Tue, 5 Sep 2023 16:04:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237774AbjIEQEw (ORCPT ); Tue, 5 Sep 2023 12:04:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244683AbjIEBZg (ORCPT ); Mon, 4 Sep 2023 21:25:36 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2BC7CC8 for ; Mon, 4 Sep 2023 18:25:32 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-500bbe3ef0eso2346532e87.1 for ; Mon, 04 Sep 2023 18:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1693877131; x=1694481931; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/MhsyB/N1tLArQBGhN7szg960JxCRye9CpHDot6cMgI=; b=O1l3HVveJh/QtHvRwkDhqMyRdlGF85oCZ5dPeTsnj/NJPSrLT01wlBnEzK/KUYJj3K bavplBq+nPDReCHNz9klCkAlxvP82lmHxVM1Ql7I/zCPmWEgsmCM1PV+JaKFZFfHN94I yQ6D6bJgN9aOiEX/ndBgaWw0c4ZYs7MAhfjhM9S8UIZWYruoNVQpJjhM1nc17JKAEB/x WTHDF+57s3BD1eG6ExMl3DO0vbzQUUiI+qNMIzVDaWvSr76M91LUoDd3ucgh5M22Y1iL FgqfDL2DL1dtjzZrcLa+5fZscVU+FzQjEtM1tDVu4NpGx4Aczkucm+BelzZpWQPSAp7C 6sSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693877131; x=1694481931; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/MhsyB/N1tLArQBGhN7szg960JxCRye9CpHDot6cMgI=; b=hcRvW8QabDFc1Z/jBYjLGV46CUfdYFzximmD1KLskuMjlwoRUhZj+dkL+iK8/GHndW LbfWwXJoJ19yE2E/I3JLIJ4WcHp6T3Lv+IvttONOnAIISsIheV9+pvxtgmJDJB+ZgHwS +2+oaOI2pJm/ZRtzE4JFfOZi7TdYdI93z4jvf86EtMudu20ZqX82QoveNSVynt1IavaV Nuqx0/LD6X+5Pz7LHRW2cHuSQFMaVaBesviA1l5LDKX6hlU7nXm9cpOAaPLETMZ5Zydz bNxbTq4BEQhH5UgVXbjma4E2keYx/QZbPf96uzDOQhjzuFoDwJHalqAYoJMoCt6+SuzU addg== X-Gm-Message-State: AOJu0YzAu2jMgvxgRetv7mIQ1KU5jUz+TOe9zIBXwbBLrmNjDEz4wgMc o1QXChErGTsa4a7Dj8CnpXL32w== X-Google-Smtp-Source: AGHT+IH0DKiodW3JxCgRkYIoZ0izC6tsZDEBBlA1yoo6e/Cr6+Fj3ZejA8TOns0f1p9Ax9m+F5Onwg== X-Received: by 2002:a05:6512:4006:b0:4fe:4896:b6ab with SMTP id br6-20020a056512400600b004fe4896b6abmr4176631lfb.15.1693877130215; Mon, 04 Sep 2023 18:25:30 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id v25-20020ac25599000000b004ff70c76208sm2062369lfg.84.2023.09.04.18.25.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Sep 2023 18:25:29 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 3/8] drm/msm/dpu: drop the `smart_dma_priority' field from struct dpu_sspp_sub_blks Date: Tue, 5 Sep 2023 04:25:21 +0300 Message-Id: <20230905012526.3010798-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230905012526.3010798-1-dmitry.baryshkov@linaro.org> References: <20230905012526.3010798-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In preparation to deduplicating SSPP subblocks, drop the (unused) `smart_dma_priority' field from struct dpu_sspp_sub_blks. If it is needed later (e.g. for SmartDMA v1), it should be added to the SSPP declarations themselves. Signed-off-by: Dmitry Baryshkov --- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 112 +++++++----------- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 - 2 files changed, 40 insertions(+), 74 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index ed7458991509..e9773274bdd6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -253,11 +253,10 @@ static const uint32_t wb2_formats[] = { #define SSPP_SCALER_VER(maj, min) (((maj) << 16) | (min)) /* SSPP common configuration */ -#define _VIG_SBLK(sdma_pri, scaler_ver) \ +#define _VIG_SBLK(scaler_ver) \ { \ .maxdwnscale = MAX_DOWNSCALE_RATIO, \ .maxupscale = MAX_UPSCALE_RATIO, \ - .smart_dma_priority = sdma_pri, \ .scaler_blk = {.name = "scaler", \ .version = scaler_ver, \ .base = 0xa00, .len = 0xa0,}, \ @@ -270,11 +269,10 @@ static const uint32_t wb2_formats[] = { .rotation_cfg = NULL, \ } -#define _VIG_SBLK_ROT(sdma_pri, scaler_ver, rot_cfg) \ +#define _VIG_SBLK_ROT(scaler_ver, rot_cfg) \ { \ .maxdwnscale = MAX_DOWNSCALE_RATIO, \ .maxupscale = MAX_UPSCALE_RATIO, \ - .smart_dma_priority = sdma_pri, \ .scaler_blk = {.name = "scaler", \ .version = scaler_ver, \ .base = 0xa00, .len = 0xa0,}, \ @@ -287,11 +285,10 @@ static const uint32_t wb2_formats[] = { .rotation_cfg = rot_cfg, \ } -#define _DMA_SBLK(sdma_pri) \ +#define _DMA_SBLK() \ { \ .maxdwnscale = SSPP_UNITY_SCALE, \ .maxupscale = SSPP_UNITY_SCALE, \ - .smart_dma_priority = sdma_pri, \ .format_list = plane_formats, \ .num_formats = ARRAY_SIZE(plane_formats), \ .virt_format_list = plane_formats, \ @@ -299,17 +296,13 @@ static const uint32_t wb2_formats[] = { } static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 = - _VIG_SBLK(0, - SSPP_SCALER_VER(1, 2)); + _VIG_SBLK(SSPP_SCALER_VER(1, 2)); static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 = - _VIG_SBLK(0, - SSPP_SCALER_VER(1, 2)); + _VIG_SBLK(SSPP_SCALER_VER(1, 2)); static const struct dpu_sspp_sub_blks msm8998_vig_sblk_2 = - _VIG_SBLK(0, - SSPP_SCALER_VER(1, 2)); + _VIG_SBLK(SSPP_SCALER_VER(1, 2)); static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 = - _VIG_SBLK(0, - SSPP_SCALER_VER(1, 2)); + _VIG_SBLK(SSPP_SCALER_VER(1, 2)); static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = { .rot_maxheight = 1088, @@ -318,107 +311,82 @@ static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = { }; static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 = - _VIG_SBLK(5, - SSPP_SCALER_VER(1, 3)); + _VIG_SBLK(SSPP_SCALER_VER(1, 3)); static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 = - _VIG_SBLK(6, - SSPP_SCALER_VER(1, 3)); + _VIG_SBLK(SSPP_SCALER_VER(1, 3)); static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 = - _VIG_SBLK(7, - SSPP_SCALER_VER(1, 3)); + _VIG_SBLK(SSPP_SCALER_VER(1, 3)); static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 = - _VIG_SBLK(8, - SSPP_SCALER_VER(1, 3)); + _VIG_SBLK(SSPP_SCALER_VER(1, 3)); static const struct dpu_sspp_sub_blks sm8150_vig_sblk_0 = - _VIG_SBLK(5, - SSPP_SCALER_VER(1, 4)); + _VIG_SBLK(SSPP_SCALER_VER(1, 4)); static const struct dpu_sspp_sub_blks sm8150_vig_sblk_1 = - _VIG_SBLK(6, - SSPP_SCALER_VER(1, 4)); + _VIG_SBLK(SSPP_SCALER_VER(1, 4)); static const struct dpu_sspp_sub_blks sm8150_vig_sblk_2 = - _VIG_SBLK(7, - SSPP_SCALER_VER(1, 4)); + _VIG_SBLK(SSPP_SCALER_VER(1, 4)); static const struct dpu_sspp_sub_blks sm8150_vig_sblk_3 = - _VIG_SBLK(8, - SSPP_SCALER_VER(1, 4)); + _VIG_SBLK(SSPP_SCALER_VER(1, 4)); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK(1); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK(2); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK(3); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK(4); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK(); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK(); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK(); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK(); static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 = - _VIG_SBLK(4, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sc7280_vig_sblk_0 = - _VIG_SBLK_ROT(4, - SSPP_SCALER_VER(3, 0), + _VIG_SBLK_ROT(SSPP_SCALER_VER(3, 0), &dpu_rot_sc7280_cfg_v2); static const struct dpu_sspp_sub_blks sm6115_vig_sblk_0 = - _VIG_SBLK(2, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sm6125_vig_sblk_0 = - _VIG_SBLK(3, - SSPP_SCALER_VER(2, 4)); + _VIG_SBLK(SSPP_SCALER_VER(2, 4)); static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 = - _VIG_SBLK(5, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 = - _VIG_SBLK(6, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 = - _VIG_SBLK(7, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 = - _VIG_SBLK(8, - SSPP_SCALER_VER(3, 0)); + _VIG_SBLK(SSPP_SCALER_VER(3, 0)); static const struct dpu_sspp_sub_blks sm8450_vig_sblk_0 = - _VIG_SBLK(5, - SSPP_SCALER_VER(3, 1)); + _VIG_SBLK(SSPP_SCALER_VER(3, 1)); static const struct dpu_sspp_sub_blks sm8450_vig_sblk_1 = - _VIG_SBLK(6, - SSPP_SCALER_VER(3, 1)); + _VIG_SBLK(SSPP_SCALER_VER(3, 1)); static const struct dpu_sspp_sub_blks sm8450_vig_sblk_2 = - _VIG_SBLK(7, - SSPP_SCALER_VER(3, 1)); + _VIG_SBLK(SSPP_SCALER_VER(3, 1)); static const struct dpu_sspp_sub_blks sm8450_vig_sblk_3 = - _VIG_SBLK(8, - SSPP_SCALER_VER(3, 1)); + _VIG_SBLK(SSPP_SCALER_VER(3, 1)); static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 = - _VIG_SBLK(7, - SSPP_SCALER_VER(3, 2)); + _VIG_SBLK(SSPP_SCALER_VER(3, 2)); static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 = - _VIG_SBLK(8, - SSPP_SCALER_VER(3, 2)); + _VIG_SBLK(SSPP_SCALER_VER(3, 2)); static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 = - _VIG_SBLK(9, - SSPP_SCALER_VER(3, 2)); + _VIG_SBLK(SSPP_SCALER_VER(3, 2)); static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 = - _VIG_SBLK(10, - SSPP_SCALER_VER(3, 2)); -static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK(5); -static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK(6); + _VIG_SBLK(SSPP_SCALER_VER(3, 2)); +static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK(); +static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK(); -#define _VIG_SBLK_NOSCALE(sdma_pri) \ +#define _VIG_SBLK_NOSCALE() \ { \ .maxdwnscale = SSPP_UNITY_SCALE, \ .maxupscale = SSPP_UNITY_SCALE, \ - .smart_dma_priority = sdma_pri, \ .format_list = plane_formats_yuv, \ .num_formats = ARRAY_SIZE(plane_formats_yuv), \ .virt_format_list = plane_formats, \ .virt_num_formats = ARRAY_SIZE(plane_formats), \ } -static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE(2); -static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK(1); +static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE(); +static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK(); /************************************************************* * MIXER sub blocks config diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index cbffbef11ee7..7c08bbd2bdc6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -373,7 +373,6 @@ struct dpu_caps { * common: Pointer to common configurations shared by sub blocks * @maxdwnscale: max downscale ratio supported(without DECIMATION) * @maxupscale: maxupscale ratio supported - * @smart_dma_priority: hw priority of rect1 of multirect pipe * @max_per_pipe_bw: maximum allowable bandwidth of this pipe in kBps * @qseed_ver: qseed version * @scaler_blk: @@ -387,7 +386,6 @@ struct dpu_caps { struct dpu_sspp_sub_blks { u32 maxdwnscale; u32 maxupscale; - u32 smart_dma_priority; u32 max_per_pipe_bw; u32 qseed_ver; struct dpu_scaler_blk scaler_blk;