From patchwork Sun Aug 27 11:50:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 717473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8358DC83F12 for ; Sun, 27 Aug 2023 11:51:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229901AbjH0LvP (ORCPT ); Sun, 27 Aug 2023 07:51:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229998AbjH0Luw (ORCPT ); Sun, 27 Aug 2023 07:50:52 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95E401AE for ; Sun, 27 Aug 2023 04:50:43 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-500913779f5so3644812e87.2 for ; Sun, 27 Aug 2023 04:50:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1693137042; x=1693741842; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PnITtNcMyMSxc31ZcHRiGB5svJMuSqesWbV/xQT+2r4=; b=TvXvxT7pX3IltVpeMhXluMpr0iAt6aKaGdiA1VhKZaLGyoPyVOq9ubp5mS6qwgCFSl 9Z0kBJA9NzujKSBXDG8mMFN2ZI0GlRox+Uk9dxspWZppfPhAYbewyHxOwbbZy38WPJiY yQ16da9gZXJHlXso3InW7qls/RCXUF4PYiyvGQ1F7YjXNeFIK67liBWvEQGuQV6DTNYd 3YVVvlW/7fsPEhSZV2M8+3Y59S3LL4vHRPU9fdsNF4GZT+z6XOl2tz3i8Fx3ywFbzlVT YSKYcJS+Q5SxT16HVYyuqyEdF+KXVUhbs1xxD2Im4uhpGacGq+43W1mcXuy+163/35QT HzhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693137042; x=1693741842; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PnITtNcMyMSxc31ZcHRiGB5svJMuSqesWbV/xQT+2r4=; b=b2RU4ZinL7niNjg+LE0/SZBlxCu6/NuYkgAQ5RDRInbChH6XWHlKc1u7geD0c6Twh7 QxKXKLqy9W/ZhoQZnnosmNwwj2Utm1VzkdcWY+NfnCL1kbGBzwcELKgIjEp64IXOORss HYxooVBLe5pV7m33d5zlfWxO+S2QC8YGIVgkNrZgmhSFjJMZ7/lSJgIe0Dfhb0debj6q 34JsIexcmItR3zz9ZItNpHFfBpkwzpxzmXyA/Pvm+hh9AOzGur8efANJBlffGvsNZd5I NeYYeFMlzr2ts6izdmhV1b/0HIt+1gr1ENbNlzPQ8NAvGhW+kMT97ZB74GU4Tp1+mcL+ kuUA== X-Gm-Message-State: AOJu0YznmrTZvmnSDixUXWgv6eOIAXD2HVfyB5kKxItv7l0CDtP4a1l/ oc0VMVQgSHr2PK43q58qVna4nxS1fggf6QwhY0U= X-Google-Smtp-Source: AGHT+IH4hcaPqPNCAltwy+paP9T8QC2pkn6BXwS5gw26TyFFBnHvfWguhcDHxeOCmsc+VH3n604uBg== X-Received: by 2002:a05:6512:3ca9:b0:4fd:fadc:f1e with SMTP id h41-20020a0565123ca900b004fdfadc0f1emr20733714lfv.44.1693137041909; Sun, 27 Aug 2023 04:50:41 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a8-20020a19f808000000b004ff9f88b86esm1114770lff.308.2023.08.27.04.50.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Aug 2023 04:50:41 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [PATCH v4 08/23] soc: qcom: Add driver for Qualcomm Krait L2 cache scaling Date: Sun, 27 Aug 2023 14:50:18 +0300 Message-Id: <20230827115033.935089-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230827115033.935089-1-dmitry.baryshkov@linaro.org> References: <20230827115033.935089-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a simple driver that handles scaling of L2 frequency and voltages. Signed-off-by: Dmitry Baryshkov --- drivers/soc/qcom/Kconfig | 9 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/krait-l2-cache.c | 160 ++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/soc/qcom/krait-l2-cache.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 715348869d04..1f3040ef551d 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -70,6 +70,15 @@ config QCOM_LLCC SDM845. This provides interfaces to clients that use the LLCC. Say yes here to enable LLCC slice driver. +config QCOM_KRAIT_L2_CACHE + tristate "Qualcomm Krait L2 cache scaling" + depends on ARCH_QCOM && ARM || COMPILE_TEST + select INTERCONNECT + select INTERCONNECT_CLK + default ARM_QCOM_CPUFREQ_NVMEM + help + The driver for scaling the L2 cache frequency on Qualcomm Krait platforms. + config QCOM_KRYO_L2_ACCESSORS bool depends on (ARCH_QCOM || COMPILE_TEST) && ARM64 diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index bbca2e1e55bb..4d16e5cdd334 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_QCOM_STATS) += qcom_stats.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o obj-$(CONFIG_QCOM_APR) += apr.o obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o +obj-$(CONFIG_QCOM_KRAIT_L2_CACHE) += krait-l2-cache.o obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o qcom_ice-objs += ice.o diff --git a/drivers/soc/qcom/krait-l2-cache.c b/drivers/soc/qcom/krait-l2-cache.c new file mode 100644 index 000000000000..fb0ca9f4797c --- /dev/null +++ b/drivers/soc/qcom/krait-l2-cache.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* Random ID that doesn't clash with main qnoc and OSM */ +#define L2_MASTER_NODE 2000 + +static int krait_l2_set_one_supply(struct device *dev, + struct regulator *reg, + struct dev_pm_opp_supply *supply) +{ + int ret; + + dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__, + supply->u_volt_min, supply->u_volt, supply->u_volt_max); + + ret = regulator_set_voltage_triplet(reg, + supply->u_volt_min, + supply->u_volt, + supply->u_volt_max); + if (ret) { + dev_err(dev, "%s: failed to set voltage (%lu %lu %lu mV): %d\n", + __func__, supply->u_volt_min, supply->u_volt, + supply->u_volt_max, ret); + return ret; + } + + return 0; +} + +/* vdd-mem and vdd-dig */ +#define NUM_SUPPLIES 2 +static int krait_l2_config_regulators(struct device *dev, + struct dev_pm_opp *old_opp, + struct dev_pm_opp *new_opp, + struct regulator **regulators, + unsigned int count) +{ + struct dev_pm_opp_supply supplies[NUM_SUPPLIES]; + unsigned long old_freq, freq; + int ret; + + if (WARN_ON_ONCE(count != NUM_SUPPLIES)) + return -EINVAL; + + ret = dev_pm_opp_get_supplies(new_opp, supplies); + if (WARN_ON(ret)) + return ret; + + old_freq = dev_pm_opp_get_freq(old_opp); + freq = dev_pm_opp_get_freq(new_opp); + + WARN_ON(!old_freq || !freq); + if (freq > old_freq) { + ret = krait_l2_set_one_supply(dev, regulators[0], &supplies[0]); + if (ret) + return ret; + + ret = krait_l2_set_one_supply(dev, regulators[1], &supplies[1]); + if (ret) { + dev_pm_opp_get_supplies(old_opp, supplies); + krait_l2_set_one_supply(dev, regulators[0], &supplies[0]); + + return ret; + } + } else { + ret = krait_l2_set_one_supply(dev, regulators[1], &supplies[1]); + if (ret) + return ret; + + ret = krait_l2_set_one_supply(dev, regulators[0], &supplies[0]); + if (ret) { + dev_pm_opp_get_supplies(old_opp, supplies); + krait_l2_set_one_supply(dev, regulators[1], &supplies[1]); + + return ret; + } + } + + return 0; +} + +static int krait_l2_probe(struct platform_device *pdev) +{ + struct dev_pm_opp_config krait_l2_cfg = { + .clk_names = (const char * const[]) { NULL, NULL }, + .config_regulators = krait_l2_config_regulators, + .regulator_names = (const char * const[]) { "vdd-mem", "vdd-dig", NULL }, + }; + struct icc_clk_data data[] = { + { .name = "l2", .opp = true }, + }; + + struct device *dev = &pdev->dev; + struct icc_provider *provider; + struct clk *clk; + int ret; + + clk = devm_clk_get(dev, NULL); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ret = devm_pm_opp_set_config(dev, &krait_l2_cfg); + if (ret) + return ret; + + ret = devm_pm_opp_of_add_table(dev); + if (ret) + return ret; + + data[0].clk = clk; + provider = icc_clk_register(dev, L2_MASTER_NODE, ARRAY_SIZE(data), data); + if (IS_ERR(provider)) + return PTR_ERR(provider); + + platform_set_drvdata(pdev, provider); + + return 0; +} + +static int krait_l2_remove(struct platform_device *pdev) +{ + struct icc_provider *provider = platform_get_drvdata(pdev); + + icc_clk_unregister(provider); + + return 0; +} + +static const struct of_device_id krait_l2_match_table[] = { + { .compatible = "qcom,krait-l2-cache" }, + {} +}; +MODULE_DEVICE_TABLE(of, krait_l2_match_table); + +static struct platform_driver krait_l2_driver = { + .probe = krait_l2_probe, + .remove = krait_l2_remove, + .driver = { + .name = "qcom-krait-l2", + .of_match_table = krait_l2_match_table, + .sync_state = icc_sync_state, + }, +}; + +module_platform_driver(krait_l2_driver); + +MODULE_DESCRIPTION("Qualcomm Krait L2 scaling driver"); +MODULE_LICENSE("GPL v2");