| Message ID | 20230820142035.89903-8-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | 4807ff70e228b5e9c6ea6c7c5651a3fd74a5cfda |
| Headers | show |
| Series | phy: qcom-qmp-pcie: convert to newer style of bindings | expand |
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 565764c5ffeb..a63ca7424974 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -3750,6 +3750,12 @@ static const struct of_device_id qmp_pcie_of_match_table[] = { }, { .compatible = "qcom,sdx65-qmp-gen4x2-pcie-phy", .data = &sdx65_qmp_pciephy_cfg, + }, { + .compatible = "qcom,sm8150-qmp-gen3x1-pcie-phy", + .data = &sm8250_qmp_gen3x1_pciephy_cfg, + }, { + .compatible = "qcom,sm8150-qmp-gen3x2-pcie-phy", + .data = &sm8250_qmp_gen3x2_pciephy_cfg, }, { .compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy", .data = &sm8250_qmp_gen3x1_pciephy_cfg,
Reuse sm8250 configuration to add support for both single lane and dual lane PCIe PHYs on the Qualcomm SM8150 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 6 ++++++ 1 file changed, 6 insertions(+)