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([188.252.220.253]) by smtp.googlemail.com with ESMTPSA id d3-20020a1709063ec300b0099bcb44493fsm2694907ejj.147.2023.08.11.14.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Aug 2023 14:01:45 -0700 (PDT) From: Robert Marko To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 1/2] ARM: dts: qcom: ipq4019-ap.dk01.1: use existing labels for nodes Date: Fri, 11 Aug 2023 23:01:02 +0200 Message-ID: <20230811210142.403160-1-robimarko@gmail.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org All of the nodes under soc already have existing labels so use those instead. Signed-off-by: Robert Marko Reviewed-by: Konrad Dybcio Reviewed-by: Konrad Dybcio --- .../boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 140 +++++++++--------- 1 file changed, 69 insertions(+), 71 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi index 0505270cf508..0714616c9e45 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi @@ -27,87 +27,85 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; +}; - soc { - rng@22000 { - status = "okay"; - }; +&prng { + status = "okay"; +}; - pinctrl@1000000 { - serial_pins: serial_pinmux { - mux { - pins = "gpio60", "gpio61"; - function = "blsp_uart0"; - bias-disable; - }; - }; - - spi_0_pins: spi_0_pinmux { - pinmux { - function = "blsp_spi0"; - pins = "gpio55", "gpio56", "gpio57"; - }; - pinmux_cs { - function = "gpio"; - pins = "gpio54"; - }; - pinconf { - pins = "gpio55", "gpio56", "gpio57"; - drive-strength = <12>; - bias-disable; - }; - pinconf_cs { - pins = "gpio54"; - drive-strength = <2>; - bias-disable; - output-high; - }; - }; +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; }; + }; - blsp_dma: dma-controller@7884000 { - status = "okay"; + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; }; - - spi@78b5000 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "okay"; - cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; - - mx25l25635e@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0>; - compatible = "mx25l25635e"; - spi-max-frequency = <24000000>; - }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; }; - - serial@78af000 { - pinctrl-0 = <&serial_pins>; - pinctrl-names = "default"; - status = "okay"; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; }; - - cryptobam: dma-controller@8e04000 { - status = "okay"; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; }; + }; +}; - crypto@8e3a000 { - status = "okay"; - }; +&blsp_dma { + status = "okay"; +}; - watchdog@b017000 { - status = "okay"; - }; +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + mx25l25635e@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "mx25l25635e"; + spi-max-frequency = <24000000>; + }; +}; - wifi@a000000 { - status = "okay"; - }; +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; - wifi@a800000 { - status = "okay"; - }; - }; +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; +}; + +&wifi1 { + status = "okay"; };