From patchwork Fri Jul 28 17:02:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jessica Zhang X-Patchwork-Id: 708550 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91A77C04FDF for ; Fri, 28 Jul 2023 17:03:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235522AbjG1RDg (ORCPT ); Fri, 28 Jul 2023 13:03:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235539AbjG1RDc (ORCPT ); Fri, 28 Jul 2023 13:03:32 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1293C2113; Fri, 28 Jul 2023 10:03:21 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36SDb4uT008309; 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Fri, 28 Jul 2023 17:02:54 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 28 Jul 2023 10:02:53 -0700 From: Jessica Zhang Date: Fri, 28 Jul 2023 10:02:13 -0700 Subject: [PATCH RFC v5 04/10] drm/atomic: Add pixel source to plane state dump MIME-Version: 1.0 Message-ID: <20230728-solid-fill-v5-4-053dbefa909c@quicinc.com> References: <20230728-solid-fill-v5-0-053dbefa909c@quicinc.com> In-Reply-To: <20230728-solid-fill-v5-0-053dbefa909c@quicinc.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Clark , Dmitry Baryshkov , "Sean Paul" , Marijn Suijten CC: , , , , , , , , , , , Jessica Zhang X-Mailer: b4 0.13-dev-034f2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1690563772; l=2429; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=kGhbjh2hOvdJWzZhpe7DOggO0n8idJvRqZDJ1Lh0Zuw=; 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drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)"); + drm_printf(p, "\tpixel-source=%s\n", drm_plane_get_pixel_source_name(state->pixel_source)); drm_printf(p, "\tfb=%u\n", state->fb ? state->fb->base.id : 0); if (state->fb) drm_framebuffer_print_info(p, 2, state->fb); diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h index 501a10edd0e1..75b59ec9f1be 100644 --- a/drivers/gpu/drm/drm_crtc_internal.h +++ b/drivers/gpu/drm/drm_crtc_internal.h @@ -38,6 +38,7 @@ enum drm_color_encoding; enum drm_color_range; enum drm_connector_force; enum drm_mode_status; +enum drm_plane_pixel_source; struct drm_atomic_state; struct drm_bridge; @@ -267,6 +268,7 @@ int drm_plane_check_pixel_format(struct drm_plane *plane, u32 format, u64 modifier); struct drm_mode_rect * __drm_plane_get_damage_clips(const struct drm_plane_state *state); +const char *drm_plane_get_pixel_source_name(enum drm_plane_pixel_source pixel_source); /* drm_bridge.c */ void drm_bridge_detach(struct drm_bridge *bridge); diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index f342cf15412b..4188b3491625 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -1487,6 +1487,18 @@ __drm_plane_get_damage_clips(const struct drm_plane_state *state) state->fb_damage_clips->data : NULL); } +const char *drm_plane_get_pixel_source_name(enum drm_plane_pixel_source pixel_source) +{ + switch(pixel_source) { + case DRM_PLANE_PIXEL_SOURCE_NONE: + return "NONE"; + case DRM_PLANE_PIXEL_SOURCE_FB: + return "fb"; + default: + return ""; + } +} + /** * drm_plane_get_damage_clips - Returns damage clips. * @state: Plane state.