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[83.9.31.96]) by smtp.gmail.com with ESMTPSA id d18-20020a2e96d2000000b002b708450951sm435563ljj.88.2023.07.11.05.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 05:19:34 -0700 (PDT) From: Konrad Dybcio Date: Tue, 11 Jul 2023 14:18:51 +0200 Subject: [PATCH 52/53] interconnect: qcom: sm8550: Point display paths to the display RSC MIME-Version: 1.0 Message-Id: <20230708-topic-rpmh_icc_rsc-v1-52-b223bd2ac8dd@linaro.org> References: <20230708-topic-rpmh_icc_rsc-v1-0-b223bd2ac8dd@linaro.org> In-Reply-To: <20230708-topic-rpmh_icc_rsc-v1-0-b223bd2ac8dd@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689077904; l=1733; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JL7o0mask7WGyT5OOgpXbZTfu4QypRbPSv6ivg1xHjk=; b=g5PEcaastA0+757hGRpamUu4K391F2PnVaPxUU5BCcKmXycbS8JudpIcZ1n14tPUfV/YxXGAr u3V8Yb4LTMMDYFOs18dH266Gk0UlXoW91XeF42ZqHdbF8MAGoK9VKp+ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The _DISP paths are expected to go through the DISP RSC. Point them to the correct place. Fixes: e6f0d6a30f73 ("interconnect: qcom: Add SM8550 interconnect provider driver") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/sm8550.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom/sm8550.c index 40740cf5e41d..41314b214cbe 100644 --- a/drivers/interconnect/qcom/sm8550.c +++ b/drivers/interconnect/qcom/sm8550.c @@ -1659,28 +1659,28 @@ static struct qcom_icc_bcm bcm_sn7 = { static struct qcom_icc_bcm bcm_acv_disp = { .name = "ACV", .enable_mask = 0x1, - .voter_idx = ICC_BCM_VOTER_APPS, + .voter_idx = ICC_BCM_VOTER_DISP, .num_nodes = 1, .nodes = { &ebi_disp }, }; static struct qcom_icc_bcm bcm_mc0_disp = { .name = "MC0", - .voter_idx = ICC_BCM_VOTER_APPS, + .voter_idx = ICC_BCM_VOTER_DISP, .num_nodes = 1, .nodes = { &ebi_disp }, }; static struct qcom_icc_bcm bcm_mm0_disp = { .name = "MM0", - .voter_idx = ICC_BCM_VOTER_APPS, + .voter_idx = ICC_BCM_VOTER_DISP, .num_nodes = 1, .nodes = { &qns_mem_noc_hf_disp }, }; static struct qcom_icc_bcm bcm_sh0_disp = { .name = "SH0", - .voter_idx = ICC_BCM_VOTER_APPS, + .voter_idx = ICC_BCM_VOTER_DISP, .num_nodes = 1, .nodes = { &qns_llcc_disp }, }; @@ -1688,7 +1688,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = { static struct qcom_icc_bcm bcm_sh1_disp = { .name = "SH1", .enable_mask = 0x1, - .voter_idx = ICC_BCM_VOTER_APPS, + .voter_idx = ICC_BCM_VOTER_DISP, .num_nodes = 2, .nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp }, };