From patchwork Thu Jul 6 10:50:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imran Shaik X-Patchwork-Id: 699688 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23201EB64DC for ; Thu, 6 Jul 2023 10:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231835AbjGFKwD (ORCPT ); Thu, 6 Jul 2023 06:52:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231682AbjGFKvu (ORCPT ); Thu, 6 Jul 2023 06:51:50 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14D601BD4; Thu, 6 Jul 2023 03:51:46 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3664XUDD031622; Thu, 6 Jul 2023 10:51:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=CvxegzwJa83s365OZ1ptYkyCHd2rZqLB7UmTfWmtDzU=; b=OsiZZ4bZ6/9bLcpvL9APwlQg7nzQSM/tIoGk3U4lEsIPcv5/6S9R3wS2DHU9mxCNZSig qAbuhmTHkJMmnVa9jPGrvAlTIn+lFzgCKM0JzHcnnOYeMW+H4JP5xf1CvKDUlLx2faPn q8MdpRLguwPw1DuGzy1IBLx+lvq+1jPz1j52A10BcauncPBLG/0I94TCuazDkeLvrR9K YMK93PY5h4kSDTyqnXH8NmfYsPpedCjVSpW+jgsGs5OKc9kKgyET4TND1Q410f3Zw48c ZJ3aETojIjERuyEbVeDhC6MZRrSosSHPs6yrNi2tWCyOCz08ecxZ7nhsDZPn3GD84kbH +A== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rmxpnbkb9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 06 Jul 2023 10:51:42 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 366ApeX7015144 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Jul 2023 10:51:41 GMT Received: from hu-imrashai-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Thu, 6 Jul 2023 03:51:35 -0700 From: Imran Shaik To: Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Bjorn Andersson , Taniya Das , Imran Shaik , "Melody Olvera" , Dmitry Baryshkov , , , , , Jagadeesh Kona , Satya Priya Kakitapalli , Ajit Pandey , Rob Herring Subject: [PATCH V3 1/6] dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs Date: Thu, 6 Jul 2023 16:20:40 +0530 Message-ID: <20230706105045.633076-2-quic_imrashai@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230706105045.633076-1-quic_imrashai@quicinc.com> References: <20230706105045.633076-1-quic_imrashai@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: XuTIdBcggV2UyowmaIXYcbuNeCk_-PuA X-Proofpoint-GUID: XuTIdBcggV2UyowmaIXYcbuNeCk_-PuA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-06_06,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 clxscore=1011 impostorscore=0 malwarescore=0 adultscore=0 mlxlogscore=999 spamscore=0 suspectscore=0 priorityscore=1501 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307060095 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update the qcom GCC clock bindings for QDU1000 and QRU1000 SoCs. Co-developed-by: Taniya Das Signed-off-by: Taniya Das Signed-off-by: Imran Shaik Acked-by: Rob Herring --- Changes since v2: - None Changes since v1: - Removed the v2 variant compatible string changes - Updated the maintainers list Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml | 3 ++- include/dt-bindings/clock/qcom,qdu1000-gcc.h | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml index 767a9d03aa32..d712b1a87e25 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000 maintainers: - - Melody Olvera + - Taniya Das + - Imran Shaik description: | Qualcomm global clock control module which supports the clocks, resets and diff --git a/include/dt-bindings/clock/qcom,qdu1000-gcc.h b/include/dt-bindings/clock/qcom,qdu1000-gcc.h index ddbc6b825e80..2fd36cbfddbb 100644 --- a/include/dt-bindings/clock/qcom,qdu1000-gcc.h +++ b/include/dt-bindings/clock/qcom,qdu1000-gcc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ /* - * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_QCOM_GCC_QDU1000_H @@ -138,6 +138,8 @@ #define GCC_AGGRE_NOC_ECPRI_GSI_CLK 128 #define GCC_PCIE_0_PIPE_CLK_SRC 129 #define GCC_PCIE_0_PHY_AUX_CLK_SRC 130 +#define GCC_GPLL1_OUT_EVEN 131 +#define GCC_DDRSS_ECPRI_GSI_CLK 132 /* GCC resets */ #define GCC_ECPRI_CC_BCR 0