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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004fb763b5171sm325784lfn.86.2023.07.06.09.35.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jul 2023 09:35:38 -0700 (PDT) From: Konrad Dybcio Date: Thu, 06 Jul 2023 18:35:37 +0200 Subject: [PATCH] arm64: dts: qcom: sm8350: Use proper CPU compatibles MIME-Version: 1.0 Message-Id: <20230706-topic-sm8350-cpu-compat-v1-1-f8d6a1869781@linaro.org> X-B4-Tracking: v=1; b=H4sIAFjtpmQC/x2NQQrCMBAAv1L27EJMrAa/Ih6SzWoX2iRkWxFK/ 27wOAPD7KDchBXuww6NP6JScofzaQCaQn4zSuoM1lhnbuaKa6lCqIt3o0GqG1JZaljRXqI3nse UrINex6CMsYVMU+/zNs9d1sYv+f53j+dx/AALzp1hfgAAAA== To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688661337; l=2791; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=GNy5G2e4ewtEYejU2/KqSKUdoornsUfW/gbpWdaEdvs=; b=t11FWiz+JUHLRsWMF8TySNmsOWb3ZgqOKOEpei+brzyI9S/luyVr32TK3svlrh/TMIHnKyoZL YitrBxZtn/mBV8lEuj/mO7s5wCOc8nb8vfiFBEtSN+IhCGXDRT92mOX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Kryo names (once again) turned out to be fake. The CPUs report: 0x412fd050 (CA55 r2p0) (0 - 3) 0x411fd410 (CA78 r1p1) (4 - 6) 0x411fd440 (CX1 r1p1) (7) Use the compatibles that reflect that. Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) --- base-commit: c36ac601a98fb148147640bae219108ee81566f8 change-id: 20230706-topic-sm8350-cpu-compat-24b808e5dd23 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index ec451c616f3e..8ecfe84ba1b6 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -48,7 +48,7 @@ cpus { CPU0: cpu@0 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a55"; reg = <0x0 0x0>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; @@ -72,7 +72,7 @@ L3_0: l3-cache { CPU1: cpu@100 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a55"; reg = <0x0 0x100>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; @@ -91,7 +91,7 @@ L2_100: l2-cache { CPU2: cpu@200 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a55"; reg = <0x0 0x200>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; @@ -110,7 +110,7 @@ L2_200: l2-cache { CPU3: cpu@300 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a55"; reg = <0x0 0x300>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; @@ -129,7 +129,7 @@ L2_300: l2-cache { CPU4: cpu@400 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a78"; reg = <0x0 0x400>; clocks = <&cpufreq_hw 1>; enable-method = "psci"; @@ -148,7 +148,7 @@ L2_400: l2-cache { CPU5: cpu@500 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a78"; reg = <0x0 0x500>; clocks = <&cpufreq_hw 1>; enable-method = "psci"; @@ -167,7 +167,7 @@ L2_500: l2-cache { CPU6: cpu@600 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-a78"; reg = <0x0 0x600>; clocks = <&cpufreq_hw 1>; enable-method = "psci"; @@ -186,7 +186,7 @@ L2_600: l2-cache { CPU7: cpu@700 { device_type = "cpu"; - compatible = "qcom,kryo685"; + compatible = "arm,cortex-x1"; reg = <0x0 0x700>; clocks = <&cpufreq_hw 2>; enable-method = "psci";