From patchwork Wed Jul 5 12:10:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 699706 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26A0AC04E69 for ; Wed, 5 Jul 2023 12:11:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231552AbjGEMLL (ORCPT ); Wed, 5 Jul 2023 08:11:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230100AbjGEMLI (ORCPT ); Wed, 5 Jul 2023 08:11:08 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1424EBE; Wed, 5 Jul 2023 05:11:08 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:cbfb:e358:222c:d8c1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5F1146606FB6; Wed, 5 Jul 2023 13:11:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1688559066; bh=08pz2UKBXmFkMllWQeyJmK7L9R8AXzq83ydZhWVZx80=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R6pZ9c993XtQk914uQhpn088GBYIK0W6YxofCqv1NKy0heOsdBzG3sZJppsnSXPFj p0aXIYIBhGIQsG2rwSuycV53WOF+tHtLOBFlDkuG88uLo5F5lhsIz+2+DF2ltbnddn jjmdfNZ7cmxe0P3uCQRc41vX60gZ5K9NxUM1SsAmSUGce7VzpQ+7rR7xcpVjm46oBE 87H1Jk277U5gPbGvjo1hykSewirSdDL0ermsca4libtzSSbV3o2gjq8gdfETFRG0BW X7wtKDVpdIwQpT8eCHEhj672vTNyFrj4m3HlpyhEGXoCSgijAsFz/e4ynS3KfIQkj1 aHpRkoqvwwdJg== From: Benjamin Gaignard To: mchehab@kernel.org, tfiga@chromium.org, m.szyprowski@samsung.com, ming.qian@nxp.com, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v4 06/10] media: verisilicon: vp9: Use destination buffer height to compute chroma offset Date: Wed, 5 Jul 2023 14:10:52 +0200 Message-Id: <20230705121056.37017-7-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230705121056.37017-1-benjamin.gaignard@collabora.com> References: <20230705121056.37017-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Source and destination buffer height may not be the same because alignment constraint are different. Use destination height to compute chroma offset because we target this buffer as hardware output. Signed-off-by: Benjamin Gaignard Fixes: e2da465455ce ("media: hantro: Support VP9 on the G2 core") --- version 4: - Add Fixes tag drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c index 6db1c32fce4d..1f3f5e7ce978 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c @@ -93,9 +93,7 @@ static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_ static size_t chroma_offset(const struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) { - int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; - - return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; + return ctx->dst_fmt.width * ctx->dst_fmt.height * ctx->bit_depth / 8; } static size_t mv_offset(const struct hantro_ctx *ctx,