Message ID | 20230604162800.1048327-7-dmitry.baryshkov@linaro.org |
---|---|
State | New |
Headers | show |
Series | drm/msm/dpu: change interrupts code to make 0 be the no IRQ | expand |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c index 9eeeb046db15..3bc0e6f704a5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -178,8 +178,7 @@ static const struct dpu_intr_reg dpu_intr_set[] = { }, }; -#define DPU_IRQ_REG(irq_idx) (irq_idx / 32) -#define DPU_IRQ_MASK(irq_idx) (BIT(irq_idx % 32)) +#define DPU_IRQ_MASK(irq_idx) (BIT(DPU_IRQ_OFFSET(irq_idx))) /** * dpu_core_irq_callback_handler - dispatch core interrupts diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h index 06c7bedd5c0a..41f2dff7d689 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h @@ -42,6 +42,8 @@ enum dpu_hw_intr_reg { }; #define DPU_IRQ_IDX(reg_idx, offset) (reg_idx * 32 + offset) +#define DPU_IRQ_REG(irq_idx) ((irq_idx) / 32) +#define DPU_IRQ_OFFSET(irq_idx) ((irq_idx) % 32) /** * struct dpu_hw_intr: hw interrupts handling data structure
In preparation of slighly changing IRQ numbering, move DPU_IRQ_REG() macro to the dpu_hw_interrupts.h header. Also split the DPU_IRQ_MASK() macro into local DPU_IRQ_MASK() and the global DPU_IRQ_OFFSET() macros. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 3 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-)